DOC8228 Datasheet, PDF (15/20 Pages) List of Unclassifed Manufacturers – ZigBit™ 2.4 GHz Amplified Wireless Modules

Specifications
Table 3-6. Pin descriptions
Connector
Pin
35
36
Pin Name
AGND
GPIO9/1_WR
37
UART_DTR
38
39
40
41
42
43
44,45,51,52,
53,56,57
46,47
48,50
49
54,55
USART0_RXD
USART0_TXD
USART0_EXTCLK
GPIO8
IRQ_7
IRQ_6
DGND
VRR
RF GND
RFP_IO
VTT
Description
Analog ground
General Purpose digital input/output 9 /
1-wire interface^(2)(3)(4)(7)
DTR input (Data Terminal Ready) for UART.
Active low^(2)(3)(4)(7)
USART/SPI Receive pin^(2)(3)(4)(7)
USART /SPI Transmit pin^(2)(3)(4)(7)
USART/SPI External Clock^{(2)(3)(4)(7)(11)}
General Purpose Digital Input/Output
Digital Input Interrupt request 7^(2)(3)(4)(7)
Digital Input Interrupt request 6^(2)(3)(4)(7)
Digital ground
Receiver supply voltage⁽⁹⁾
RF Analog Ground^(2)(3)(4)(7)
Differential RF Input/Output⁽¹⁰⁾
Transmitter supply voltage⁽⁹⁾
Default
State after
I/O Power on
I/O
I
tri-state
I
tri-state
O
tri-state
I/O
tri-state
I/O
tri-state
I
tri-state
I
tri-state
I/O
Notes:
1. The UART_TXD pin is intended for input (i.e. its designation as "TXD" implies some complex system
containing ZigBit Amp as its RF terminal unit), while UART_RXD pin, vice versa is for output.
2. Most of pins can be configured for general purpose I/O or for some alternate functions as described in
details in the ATmega1281V Datasheet [3].
3. GPIO pins can be programmed either for output, or for input with/without pull-up resistors. Output pin
drivers are strong enough to drive LED displays directly (refer to figures on pages 387-388, [3]).
4. All digital pins are provided with protection diodes to D_VCC and DGND
5. It is strongly recommended to avoid assigning an alternate function for OSC32K_OUT pin because it is
used by BitCloud. However, this signal can be used if another peripheral or host processor requires
32.768 kHz clock, otherwise this pin can be disconnected.
6. Normally, JTAG_TMS, JTAG_TDI, JTAG_TDO, JTAG_TCK pins are used for on-chip debugging and
flash burning. They can be used for A/D conversion if JTAGEN fuse is disabled.
7. The following pins can be configured with the BitCloud software to be general-purpose I/O lines:
GPIO1, GPIO2, GPIO3, GPIO4, GPIO5, GPIO6, GPIO7, GPIO8, GPIO_1WR, I2C_CLK, I2C_DATA,
UART_TXD, UART_RXD, UART_RTS, UART_CTS, ADC_INPUT_3, ADC_INPUT_2, ADC_INPUT_1,
BAT, UART_DTR, USART0_RXD, USART0_TXD, USART0_EXTCLK, IRQ_7, IRQ_6. Additionally, four
JTAG lines can be programmed with software as GPIO as well, but this requires changing the fuse bits
and will disable JTAG debugging.
8. With BitCloud, CTS pin can be configured to indicate sleep/active condition of the module thus provid-
ing mechanism for power management of host processor. If this function is necessary, connection of
this pin to external pull-down resistor is recommended to prevent the undesirable transients during
module reset process.
ZigBit™ 2.4 GHz Amplified Wireless Modules
3-12
8228B–MCU Wireless–06/09