MTV038 Datasheet, PDF (13/25 Pages) List of Unclassifed Manufacturers – On-Screen Display Controller for CRT/LCD Monitor

MYSON
TECHNOLOGY
MTV038
(Revision 1.1)
b7 b6 b5 b4 b3 b2 b1 b0
Column 16 -
-
-
RSPACE
MSB
LSB
RSPACE - Define the row to row spacing in unit of horizontal line. That is, extra RSPACE horizontal lines will
be appended below each display row, and the maximum space is 31 lines. The initial value is 0
after power up.
b7
b6
b5
b4
b3
b2
b1
b0
Column 17 _{OSDEN BSEN SHADOW FBEN BLEND WENCLR RAMCLR FBKGC}
OSDEN - Activate the OSD operation when this bit is set to "1". The initial value is 0 after power up.
BSEN - Enable the bordering and shadowing effect.
SHADOW - Bordering and shadowing effect select bit. Activate the shadowing effect if this bit is set, otherwise
the bordering is chosen.
FBEN - Enable the fade-in/fade-out and blending-in/blending-out effect when OSD is turned on from off state
or vice versa.
BLEND - Fade-in/fade-out and blending-in/blending-out effect select bit. Activate the blendinf-in/blending-out
function if this bit is set, otherwise the fade-in/fade-out function is chosen. These function roughly
takes about 0.5 second to fully display the whole menu or to disappear completely.
WENCLR - Clear all WEN bits of window control registers when this bit is set to "1". The initial value is 0 after
power up.
RAMCLR - Clear all ADDRESS bytes, BGR, BGG, BGB and BLINK bits of display registers when this bit is set
to "1". The initial value is 0 after power up.
FBKGC - Define the output configuration for FBKG pin. When it is set to "0", the FBKG outputs high during the
displaying of characters or windows, otherwise, it outputs high only during the displaying of charac-
ter.
B7
b6
Column 18 _{TRIC FSS}
b5
b4
b3
b2
- SELVCL/DWE HSP VSP
(SELVCL, VCO1, VCO0 bits are used only for CRT monitor application.)
(DWE bit is used only for LCD monitor application.)
b1
b0
VCO1/- VCO0/-
TRIC - Define the driving state of output pins ROUT, GOUT, BOUT and FBKG when OSD is disabled. That is,
while OSD is disabled, these four pins will drive low if this bit is set to 1, otherwise these four pins are
in high impedance state. The initial value is 0 after power up.
FSS - Font size selection.
= 1 -> 12x18 font size selected.
= 0 -> 12x16 font size selected.
SELVCL - Enable auto detection for horizontal and vertical syncs input edge distortion to avoid unstable
Vsync leading mismatch with Hsync signal while the bit is set to "1". The initial value is 0 after
power up.
Revision 1.1
-13-
2001/8/21