HWD2119 Datasheet, PDF (11/21 Pages) List of Unclassifed Manufacturers – 350mWAudio Power Amplifier with Shutdown Mode

Application Information (Continued)
In order to eliminate ’clicks and pops’, all capacitors must be
discharged before turn-on. Rapidly switching V_DD may not
allow the capacitors to fully discharge, which may cause
’clicks and pops’.
AUDIO POWER AMPLIFIER DESIGN EXAMPLE
The following are the desired operational
parameters:
Given:
Power Output
100mW
Load Impedance
16Ω
Input Level
1Vrms (max)
Input Impedance
20kΩ
Bandwidth
100Hz–20kHz ± 0.25dB
The design begins by specifying the minimum supply voltage
necessary to obtain the specified output power. To find this
minimum supply voltage, use the Output Power vs. Supply
Voltage graph in the Typical Performance Characteristics
section. From the graph for a 16Ω load, (graphs are for 8Ω,
16Ω, and 32Ω loads) the supply voltage for 100mW of output
power with 1% THD+N is approximately 3.15 volts.
Additional supply voltage creates the benefit of increased
headroom that allows the HWD2119 to reproduce peaks in
excess of 100mW without output signal clipping or audible
distortion. The choice of supply voltage must also not create
a situation that violates maximum dissipation as explained
above in the Power Dissipation section. For example, if a
3.3V supply is chosen for extra headroom then according to
Equation (3) the maximum power dissipation point with a
16Ω load is 138mW. Using Equation (4) the maximum am-
bient temperature is 121˚C for the MUA08A package and
126˚C for the M08A package.
After satisfying the HWD2119’s power dissipation require-
ments, the minimum differential gain is found using Equation
(6).
The last step in this design example is setting the amplifier’s
-3dB frequency bandwidth. To achieve the desired ±0.25dB
pass band magnitude variation limit, the low frequency re-
sponse must extend to at least one-fifth the lower bandwidth
limit and the high frequency response must extend to at least
five times the upper bandwidth limit. The gain variation for
both response limits is 0.17dB, well with in the ±0.25dB
desired limit.
The results are:
f_L = 100Hz/5 = 20Hz
f_H = 20 kHz*5 = 100kHz
As mentioned in the External Components section, R_i and
C_i create a high pass filter that sets the amplifier’s lower
band pass frequency limit. Find the coupling capacitor’s
value using Equation (8).
C_i ≥ 1/(2πR_if_c) (F)
(8)
C_i ≥ 0.398µF, a standard value of 0.39µF will be used. The
product of the desired high frequency cutoff (100kHz in this
example) and the differential gain, A_VD, determines the up-
per pass band response limit. With A_VD = 1.27 and f_H =
100kHz, the closed-loop gain bandwidth product (GBWP) is
127kHz. This is less than the HWD2119’s 900kHz GBWP. With
this margin the amplifier can be used in designs that require
more differential gain while avoiding performance restricting
bandwidth limitations.
(6)
Thus a minimum gain of 1.27 V/V allows the HWD2119 to
reach full output swing and maintain low noise and THD+N
performance. For this example, let A_VD = 1.27. The amplifi-
er’s overall gain is set using the input (R_i) and feedback (R_F)
resistors. With the desired input impedance set to 20kΩ, the
feedback resistor is found using Equation (7).
R_F/R_i = A_VD/2 (V/V)
(7)
The value of R_F is 13kΩ.
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