TH7121 Datasheet, PDF (10/28 Pages) List of Unclassifed Manufacturers – 300 to 930MHz FSK/FM/ASK Transceiver

TH7121
300 to 930MHz
FSK/FM/ASK Transceiver
Programmable Channel Operation
Serial Control Interface Description
A 3-wire (SCLK, SDTA, SDEN) Serial Control Interface (SCI) is used to program the transceiver in multi-
channel mode (see Fig. 2). At each rising edge of the SCLK signal, the logic value on the SDTA pin is written
into a 24-bit shift register. The data stored in the shift register are loaded into one of the 4 appropriate latches
on the rising edge of SDEN. The control words are 24 bits lengths: 2 address bits and 22 data bits. The first
two bits (bit 23 and 22) are latch address bits. As additional leading bits are ignored, only the least significant
24 bits are serial-clocked into the shift register. The first incoming bit is the most significant bit (MSB). To
program the transceiver in multi-channel application, four 24-bit words may be sent: A-word, B-word, C-word
and D-word. If individual bits within a word have to be changed, then it is sufficient to program only the appro-
priate 24-bit word. The serial data input timing and the structure of the control words are illustrated in Fig. 2
and 3. Table REGISTER SETTINGS describes the function of each bit.
PRELIMINARY ^SDTA
SCLK
SDEN
22
24-BIT
SHIFT REGISTER
2
‘00’
‘01’
ADDR DECODER ^{‘10’}
‘11’
22
A - LATCH ²²
A-word
22
B - LATCH ²²
B-word
22
C - LATCH ²²
C-word
22
D - LATCH ²²
D-word
Figure 2: SCI block diagram
Due to the static CMOS design, the SCI consumes virtually no current and it can be programmed in active as
well as in standby mode.
Invalid
data ^MSB
SDTA
bit 23
bit 22
Invalid
LSB
data
bit 1
bit 0
SCLK
t_CS
t_CH
SDEN
Figure 3: Serial data input timing
3901007121
Rev. 001
t_CWL t_CWH
t_ES
t_EW t_EH
Page 10 of 28
Data Sheet
Jan. 2002