UT62L6416 Datasheet, PDF (1/12 Pages) List of Unclassifed Manufacturers – 64K X 16 BIT LOW POWER CMOS SRAM


UTRON
Preliminary Rev. 0.1
UT62L6416
64K X 16 BIT LOW POWER CMOS SRAM
FEATURES
GENERAL DESCRIPTION
Fast access time :
55ns(max) for Vcc=3.0V~3.6V
70/100ns(max) for Vcc=2.7V~3.6V
CMOS Low operating power
Operating current: 45/35/25mA (Icc max)
Standby current: 20 uA(TYP.) L-version
3 uA(TYP.) LL-version
Single 2.7V~3.6V power supply
Operating temperature:
Commercial : 0℃~70℃
Extended : -20℃~80℃
All inputs and outputs TTL compatible
Fully static operation
Three state outputs
Data retention voltage: 1.5V (min)
Data byte control : _LB (I/O1~I/O8)
UB ^(I/O9~I/O16)
Package : 44-pin 400mil TSOPⅡ
48-pin 6mm × 8mm TFBGA
FUNCTIONAL BLOCK DIAGRAM
A0
A1
A2
A3
.
A4
ROW
MEMORY ARRAY
A8
. _DECODER
1024 Rows x 64 Columns x 16 bits
A12
.
A13
VCC
VSS
The UT62L6416 is a 1,048,576-bit low power
CMOS static random access memory organized
as 65,536 words by 16 bits.
The UT62L6416 operates from a single 2.7V ~
3.6V power supply and all inputs and outputs are
fully TTL compatible.
The UT62L6416 is design for upper and low byte
access by data byte control( _{UB LB} ).
PIN DESCRIPTION
SYMBOL
A0 - A15
I/O1 - I/O16
CE
WE
OE
LB
UB
V_CC
V_SS
NC
DESCRIPTION
Address Inputs
Data Inputs/Outputs
Chip Enable Input
Write Enable Input
Output Enable Input
Lower-Byte Control
High-Byte Control
Power Supply
Ground
No Connection
A14
A15
I/O1
I/O
... ... _CONTROL
I/O16
...
. ..
COLUMN I/O
CE
WE
LOGIC
OE
CONTROL
LB
UB
COLUMN DECODER
A11 A10 A9 A7 A6 A5
UTRON TECHNOLOGY INC.
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: [phone] FAX: [phone]
1
P80073