P-51 Datasheet, PDF (1/4 Pages) List of Unclassifed Manufacturers – Peripheral 8051 System on a Chip

P-51
Peripheral 8051
System on a Chip
The P-51 "Peripheral 8051" is a new concept: An 8051 with
built-in (E)ISA or PC-104 interface and supporting subsystems.
These include downloadable Code RAM, dual port RAM, and all eleven
IRQs to the host. Unlike classical 8051s, the P-51 naturally and easily interfaces
to a host through simple standard buses, and its microsecond timing can provide real-time
response to Windows applications.
P-51 Features
All 8051/52 resources:
! 8K bytes downloadable Code RAM.
! 256 bytes internal Data RAM.
! Timers 0, 1, and 2.
! Ports 0, 1, 2, and 3.
! All 8051 Instructions.
! All 8051-equivalent Pins.
! Download Code RAM while reset.
! Execute Code when released.
EISA/PC-104 interface:
! 45 EISA signals supported.
! Uses one of 11 IRQ pins.
! Software selectable IRQ 3…15.
! 20 ISA Address pins.
! 8 ISA Data Bus pins.
VDD
1
75
P3.6
P1.7
2
74
P3.7
P1.6
3
73
CE OUT
P1.5
4
72
ALE
P1.4
5
71
CLK OUT
P1.3
6
70
BA0
P1.2
7
69
BA1
P1.1
8
68
BA2
P1.0
9
67
XTAL2
BCLK
10
66
XTAL1
RFRSH
11
65
GND
GND
12
64
GND
GND
13
63
GND
GND
14
62
BA3
Peripheral 8051 ^IRQ15
15
IRQ14
16
61
SD0
60
SD1
IRQ12
17
59
SD2
IRQ11
18
IRQ10
19
IRQ9
20
with
58
SD3
57
SD4
56
SD5
IRQ7
21
IRQ6
22
IRQ5
23
EISA interface ⁵⁵
SD6
54
SD7
53
ALI
IRQ4
24
52
IOCHRDY
IRQ3
25
51
VDD
! Hardware or software Reset.
! Select Segment Addr 0 and A400 to EC00.
! Uses 16K bytes of system memory space,
normally in an Upper Memory Block.
EISA
Address
Data
Control
P-51
4Kx8
Dual
Port
RAM
8Kx8
Code
RAM
IRQ
PC/104
DPTR
PC
256
x8
RAM
8051 CPU
SFR
ALE
P
0
P
1
P
2
P
3
IRQ
P-51 Architecture
Special Features:
! 4K byte dual port RAM
shared by host and P-51.
! Dual Data Pointer.
! Six new P-51 Control Registers
mapped into dual port RAM.
! Square Root function.
! Debug capability.
! Breakpoint and single-step.
! Software interrupt generation.
! 3.3v 100-pin QFP.
! 5v I/O tolerant.
! 51 MHz operation
20APR2000
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