BS616LV4018 Datasheet, PDF (1/10 Pages) List of Unclassifed Manufacturers – Very Low Power/Voltage CMOS SRAM 256K X 16 bit

BSI ^{Very Low Power/Voltage CMOS SRAM}
256K X 16 bit
BS616LV4018
„ FEATURES
• Vcc operation voltage : 4.5V ~ 5.5V
• Very low power consumption :
Vcc = 5.0V C-grade: 63mA (@55ns) operating current
I -grade: 65mA (@55ns) operating current
C-grade: 53mA (@70ns) operating current
I -grade: 55mA (@70ns) operating current
2.0uA (Typ.) CMOS standby current
• High speed access time :
-55
55ns
-70
70ns
• Automatic power down when chip is deselected
• Three state outputs and TTL compatible
• Fully static operation
• Data retention supply voltage as low as 1.5V
• Easy expansion with CE and OE options
• I/O Configuration x8/x16 selectable by LB and UB pin
„ DESCRIPTION
The BS616LV4018 is a high performance, very low power CMOS Static
Random Access Memory organized as 262,144 words by 16 bits and
operates from a range of 4.5V to 5.5V supply voltage.
Advanced CMOS technology and circuit techniques provide both high
speed and low power features with a typical CMOS standby current of
2.0uA at 5.0V/25^oC and maximum access time of 55ns at 5.0V/85^oC.
Easy memory expansion is provided by an active LOW chip enable (CE)
,active LOW output enable(OE) and three-state output drivers.
The BS616LV4018 has an automatic power down feature, reducing the
power consumption significantly when chip is deselected.
The BS616LV4018 is available in DICE form , JEDEC standard 44-pin
TSOP Type II package and 48-ball BGA package.
„ PRODUCT FAMILY
PRODUCT FAMILY
OPERATING
TEMPERATURE
BS616LV4018DC
BS616LV4018EC
BS616LV4018AC
BS616LV4018DI
BS616LV4018EI
BS616LV4018AI
+0 ^O C to +70^O C
-40 ^OC to +85 ^OC
„ PIN CONFIGURATIONS
A4
1
A3
2
A2
3
A1
4
A0
5
CE
6
DQ0
7
DQ1
8
DQ2
9
DQ3
10
VCC
11
GND
12
DQ4
13
DQ5
14
DQ6
15
DQ7
16
WE
17
A17
18
A16
19
A15
20
A14
21
A13
22
44
43
42
41
40
39
38
37
36
BS616LV4018EC
35
34
BS616LV4018EI 33
32
31
30
29
28
27
26
25
24
23
A5
A6
A7
OE
UB
LB
DQ15
DQ14
DQ13
DQ12
GND
VCC
DQ11
DQ10
DQ9
DQ8
NC
A8
A9
A10
A11
A12
Vcc
RANGE
SPEED
( ns )
55ns:4.5~5.5V
70ns:4.5~5.5V
4.5V ~ 5.5V 55 / 70
POWER DISSIPATION
STANDBY
( I CCSB1 , Max )
Operating
( I CC , Max )
Vcc = 5.0V
Vcc = 5.0V Vcc = 5.0V
55ns
70ns
30uA
63mA 53mA
4.5V ~ 5.5V 55 / 70
60uA
65mA 55mA
„ BLOCK DIAGRAM
PKG TYPE
DICE
TSOP2-44
BGA-48-0608
DICE
TSOP2-44
BGA-48-0608
A4
A3
A2
A1
Address
A0
22
2048
A17
Input
Row
A16
Buffer
A15
Decoder
A14
A13
A12
16
DQ0
.
.
Data
Input
16
Buffer
.
.
.
.
16
.
.
Data
Output
16
DQ15
Buffer
Memory Array
2048 x 2048
2048
Column I/O
Write Driver
Sense Amp
128
Column Decoder
CE
WE
OE
UB
LB
Vcc
Gnd
Control
14
Address Input Buffer
A11 A10 A9 A8 A7 A6 A5
Brilliance Semiconductor, Inc. reserves the right to modify document contents without notice.
R0201-BS616LV4018
1
Revision 2.1
Jan. 2004