LM3S316_06 Datasheet, PDF (96/409 Pages) List of Unclassifed Manufacturers – Microcontroller

Internal Memory
7.2.2.3
7.3
7.3.1
The policies may be combined as shown in Table 7-1.
Table 7-1. Flash Protection Policy Combinations
FMPPE
0
1
0
1
FMPRE
0
0
1
1
Protection
Execute-only protection. The block may only be executed and may not be
written or erased. This mode is used to protect code.
The block may be written, erased or executed, but not read. This combination
is unlikely to be used.
Read-only protection. The block may be read or executed but may not be
written or erased. This mode is used to lock the block from further modification
while allowing any read or execute access.
No protection. The block may be written, erased, executed or read.
An access that attempts to program or erase a PE-protected block is prohibited. A controller
interrupt may be optionally generated (by setting the AMASK bit in the FIM register) to alert
software developers of poorly behaving software during the development and debug phases.
An access that attempts to read an RE-protected block is prohibited. Such accesses return data
filled with all 0s. A controller interrupt may be optionally generated to alert software developers of
poorly behaving software during the development and debug phases.
The factory settings for the FMPRE and FMPPE registers are a value of 1 for all implemented
banks. This implements a policy of open access and programmability. The register bits may be
changed by writing the specific register bit. The changes are not permanent until the register is
committed (saved), at which point the bit change is permanent. If a bit is changed from a 1 to a 0
and not committed, it may be restored by executing a power-on reset sequence.
Flash Memory Programming
Writing the flash memory requires that the code be executed out of SRAM to avoid corrupting or
interrupting the bus timing. Flash pages can be erased on a page basis (1 KB in size), or by
performing a mass erase of the entire flash.
All erase and program operations are performed using the Flash Memory Address (FMA), Flash
Memory Data (FMD) and Flash Memory Control (FMC) registers. See section 7.3 for examples.
Initialization and Configuration
This section shows examples for using the flash controller to perform various operations on the
contents of the flash memory.
Changing Flash Protection Bits
As discussed in Section 7.2.2.2, changes to the protection bits must be committed before they
take effect. The sequence to change and commit a bit in software is as follows:
1. The Flash Memory Protection Read Enable (FMPRE) and Flash Memory Protection
Program Enable (FMPPE) registers are written, changing the intended bit(s). The action of
these changes can be tested by software while in this state.
2. The Flash Memory Address (FMA) register (see page 101) bit 0 is set to 1 if the FMPPE
register is to be committed; otherwise, a 0 commits the FMPRE register.
3. The Flash Memory Control (FMC) register (see page 103) is written with the COMT bit set.
This initiates a write sequence and commits the changes.
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October 8, 2006
Preliminary