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OR2C04A Datasheet, PDF (92/192 Pages) List of Unclassifed Manufacturers – Field-Programmable Gate Arrays
ORCA Series 2 FPGAs
Data Sheet
June 1999
Pin Information (continued)
Table 25. OR2C/2T06A, OR2C/2T08A, OR2C/2T10A, OR2C/2T12A, and OR2C/2T15A/B
256-Pin PBGA Pinout
Pin 2C/2T06A Pad 2C/2T08A Pad 2C/2T10A Pad 2C/2T12A Pad 2C/2T15A/B Pad
C2
PL1D
PL1D
PL1D
PL1D
PL1D
D2
PL1C
PL1B
PL1B
PL1C
PL1C
D3
PL1B
PL1A
PL1A
PL1B
PL1B
E4
PL1A
PL2D
PL2D
PL2D
PL2D
C1
—
PL2C
PL2C
PL2C
PL2A
D1
—
PL2B
PL2B
PL2B
PL3D
E3
—
PL2A
PL2A
PL2A
PL3A
E2
PL2D
PL3D
PL3D
PL3D
PL4D
E1
PL2C
PL3C
PL3C
PL3A
PL4A
F3
PL2B
PL3B
PL3B
PL4D
PL5D
G4
PL2A
PL3A
PL3A
PL4A
PL5A
F2
—
—
PL4D
PL5D
PL6D
F1
PL3D
PL4D
PL4A
PL5A
PL6A
G3
PL3C
PL4C
PL5C
PL6D
PL7D
G2
PL3B
PL4B
PL5B
PL6B
PL7B
G1
PL3A
PL4A
PL5A
PL6A
PL7A
H3
PL4D
PL5D
PL6D
PL7D
PL8D
H2
PL4C
PL5C
PL6C
PL7C
PL8C
H1
PL4B
PL5B
PL6B
PL7B
PL8B
J4
PL4A
PL5A
PL6A
PL7A
PL8A
J3
PL5D
PL6D
PL7D
PL8D
PL9D
J2
PL5C
PL6C
PL7C
PL8C
PL9C
J1
PL5B
PL6B
PL7B
PL8B
PL9B
K2
PL5A
PL6A
PL7A
PL8A
PL9A
K3
PL6D
PL7D
PL8D
PL9D
PL10D
K1
PL6C
PL7C
PL8C
PL9C
PL10C
L1
PL6B
PL7B
PL8B
PL9B
PL10B
L2
PL6A
PL7A
PL8A
PL9A
PL10A
L3
PL7D
PL8D
PL9D
PL10D
PL11D
L4
PL7C
PL8C
PL9C
PL10C
PL11C
M1
PL7B
PL8B
PL9B
PL10B
PL11B
M2
PL7A
PL8A
PL9A
PL10A
PL11A
M3
PL8D
PL9D
PL10D
PL11D
PL12D
M4
PL8C
PL9C
PL10C
PL11C
PL12C
N1
PL8B
PL9B
PL10B
PL11B
PL12B
N2
PL8A
PL9A
PL10A
PL11A
PL12A
N3
PL9D
PL10D
PL11D
PL12D
PL13D
P1
PL9C
PL10C
PL11C
PL12C
PL13C
P2
PL9B
PL10B
PL11B
PL12B
PL13B
R1
PL9A
PL10A
PL11A
PL12A
PL13A
Function
I/O
I/O
I/O
I/O-A0
I/O
I/O
I/O
I/O-VDD5
I/O
I/O
I/O-A1
I/O
I/O-A2
I/O
I/O
I/O-A3
I/O
I/O
I/O
I/O-A4
I/O-A5
I/O
I/O
I/O-A6
I/O
I/O
I/O
I/O-A7
I/O
I/O-VDD5
I/O
I/O-A8
I/O-A9
I/O
I/O
I/O-A10
I/O
I/O
I/O
I/O-A11
Notes:
The W3 pin on the 256-pin PBGA package is unconnected for all devices listed in this table.
The OR2C/2T08A do not have bond pads connected to the 256-pin PBGA package pins F2 and Y17.
The pins labeled I/O-VDD5 are user I/Os for the OR2CxxA and OR2TxxB series, but they are connected to VDD5 for the OR2TxxA series.
The pins labeled VSS-ETC are the 4 x 4 array of thermal balls located at the center of the package. The balls can be attached to the ground
plane of the board for enhanced thermal capability (see Table 29), or they can be left unconnected.
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Lucent Technologies Inc.