English
Language : 

L80227 Datasheet, PDF (81/140 Pages) List of Unclassifed Manufacturers – 10BASE-T/ 100BASE-TX Ethernet PHY
JAB_DIS
Jabber Disable
R4
Bit Meaning
1
Jabber disabled
0
Jabber enabled (default)
MREG
R
Multiple Register Access Enable
R3
Bit Meaning
1
Multiple register access enabled
0
No multiple register access (default)
Reserved
R [2:0]
These bits are reserved and must remain at the default
value of 0x0 for proper device operation.
4.3.8 Channel Status Output 0 Register (Register 18)
The default value for this register is 0x0000.
15
8
Reserved
7
6
5
0
SPD_DET DPLX_DET
Reserved
SPD_DET 100/10 Mbits/s Speed Detect
R7
Bit Meaning
1
Device is in 100 Mbits/s mode (100BASE-TX)
0
Device is in 10 Mbits/s mode (10 BASE-T)
DPLX_DET Duplex Detect
R6
Bit Meaning
1
Device is operating in Full-Duplex
0
Device is operating in Half-Duplex
R
Reserved
R [5:0]
These bits are reserved and must remain at the default
value of 0x0 for proper device operation.
Registers
Copyright © 2000, 2001, 2002 by LSI Logic Corporation. All rights reserved.
4-17