UG-2828GDEDF02 Datasheet, PDF (8/29 Pages) List of Unclassifed Manufacturers – OEL Display Module

Univision Technology Inc.
1.5 Pin Definition
Doc. No: SAS1-XXXX-A
Pin Number
2,4,27,29
3,28
25
26
5
6
7
8
9
10
11~19
20
21
22
23
24
1,30
Symbol
VSSH
VDDH
VSS
VDD.
IREF
OSCA2
OSCA1
EXPORT1
CPU
PS
D17~D9
RS
CSB
RDB
WRB
RESETB
NC
Type
Function
P Return Ground for VDDH
P External Column Driving Power Supply.
P Power supply ground
P Logic power supply.
I/O
Current Reference for Brightness Adjustment
Tie 68KΩ resistor to VSS.
O ^{Fine adjustment for oscillation}
Tie 10 KΩ resistor to OSCA1 between OSCA2.
I ^{When the external clock mode is selected, OSCA1 is used}
external clock input.
O OSC Test
I
Selects the CPU type
Low: 80-series CPU, High: 68-Series CPU.
I
Selects parallel/Serial interface type
Low: serial, High: parallel.
Host Data Input/Output Bus
These pins are 9-bit bi-directional data bus to be
connected with MCU data bus.
PS
Description
I/O
1
8_bit bus : D[17:10]
9_bit bus : D[17:9]
D[17] SCL : Synchronous clock input
0 D[16] SDI : Serial data input
D[15] SDO : Serial data output
Fix unused pins to the VSS level.
I
Selects the data/command
Low: command, High: parameter/data
Chip Select
I Low: SEPS225 is selected and can be accessed.
High: SEPS225 is not selected and cannot be accessed.
Read or Read/Write Enable
I
80-system bus interface: read strobe signal (active low).
68-system bus interface: bus enable strobe (active high).
When serial mode, fix it to VDD or VSS level.
Write or Read/Write Select
80-system bus interface: write strobe signal (active low).
I 68-system bus interface: read/write select.
Low: write, High: read.
When serial mode, fix it to VDD or VSS level.
I
Chip Reset
Reset SEPS225 (active low)
- No Connection
3