G3245H Datasheet, PDF (8/12 Pages) List of Unclassifed Manufacturers – 3.8 QVGA LCD Graphic Module without DC / DC converter

3.8" QVGA LCD Graphic Module
Preliminary
G3245H
6-4 Switching characteristics
Item
Shift clock cycle(CP)
Shift clock
high level pulse width
Shift clock
Low level pulse width
LOAD pulse width _t
LOAD CP time
CP LOAD time
DATA set up time
D3 ~ D0 CP
DATA hold time
CP D3 ~ D0
LOAD FRAME time
FRAME LOAD time
FRAME set up time
FRAME LOAD
FRAME hold time
LOAD FRAME
LOAD DF time
CP rise & fall time
LOAD rise & fall time
Symbol
t CP
t W(CH)
t W(CL)
t W(LH)
W(LL)
tLC
tCL
t DSU
t DHD
tLF
tFL
tSU(FR)
tHD(FR)
tLD
t R (CP)
t F (CP)
t R(L)
t F(L)
VD1-VS12 = 3.3V ± 0.1V, VDD - Vss = 3.3V ± 0.1V
Test condition
Min Typ Max Unit
160 -
-
ns
50 _-
-
ns
50 -
-
ns
2
-
-
∝s
10
-
-
∝s
120 _-
-
ns
120 ^-
-
ns
50 -
-
ns
50 ^-
-
ns
500 -
-
ns
500 -
-
ns
500 ^-
-
ns
15 ns
500 -
-
ns
0 - 300 ns
-
-
15
ns
-
-
15
ns
-
-
-
-
15
ns
Note. 1 LOAD signal should be with constant interval.
6-5 DF signal generation circuit
LOAD IN
3.3V
GND
C14 0.1∝ / 25V
1 _J0
2 _J1
3 _J2
4 _J3
5 _J4
6 _J5
7 _J6
8
GND
Vcc ¹⁶
/CLK ¹⁵
CLK ¹⁴
Q ¹³
PR ¹²
/SPE ¹¹
10
CLR
9
J7
HD151012T
Page 8
Fig 6-3
DF OUT
01.01 Version 2.1