EM488M3244VBB Datasheet, PDF (8/18 Pages) List of Unclassifed Manufacturers – 256Mb (2M×4Bank×32) Synchronous DRAM

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AC Operating Test Conditions
(V_DD=3.3V±0.3V, T_A=0°C ~70°C)
Item
Output Reference Level
Output Load
Input Signal Level
Transition Time of Input Signals
Input Reference Level
EM488M3244VBB
Conditions
1.4V/1.4V
See diagram as below
2.4V/0.4V
2ns
1.4V
AC Operating Test Characteristics
(V_DD=3.3V±0.3V, T_A=0°C ~70°C, -25°C ~ +85°C)
Symbol
Parameter
-7
-7.5
Units
Min. Max. Min. Max.
CL=3 7
7.5
t_CK Clock Cycle Time
CL=2 7.5
10
ns
CL=3
5.4
t_AC Access Time form CLK
CL=2
5.4
5.4
ns
6
t_CH CLK High Level Width
2.5
2.5
ns
t_CL CLK Low Level Width
2.5
2.5
ns
CL=3 3
3
t_OH Data-out Hold Time
CL=2
ns
t_HZ
Data-out High Impedance
Time ^{(Note 5)}
CL=3
CL=2
3
7
3
7
ns
t_LZ Data-out Low Impedance Time
0
0
ns
t_IH Input Hold Time
0.8
1
ns
t_IS Input Setup Time
1.5
1.5
ns
* All voltages referenced to V_SS.
Note 5: t_HZ defines the time at which the output achieve the open circuit condition and is not referenced to
output voltage levels.
Jul. 2006
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