LM3S611_06 Datasheet, PDF (79/396 Pages) List of Unclassifed Manufacturers – Microcontroller

LM3S611 Data Sheet
Register 17: Run-Mode Clock Configuration (RCC), offset 0x060
This register is defined to provide source control and frequency speed.
Run-Mode Clock Configuration (RCC)
Offset 0x060
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
Type
RO
Reset
0
15
reserved
RO
RO
0
0
14
13
ACG
SYSDIV
USESYSDIV reserved USEPWMDIV
PWMDIV
reserved
RO
R/W
R/W
R/W
R/W
R/W
R/W
RO
R/W
R/W
R/W
R/W
RO
0
0
1
1
1
1
0
0
0
1
1
1
0
12
11
10
9
8
7
6
5
4
3
2
1
0
reserved
PWRDN OEN BYPASS PLLVER
XTAL
OSCSRC IOSCVER MOSCVER IOSCDIS MOSCDIS
Type
RO
RO
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RO
RO
Reset
0
0
1
1
1
0
1
0
1
1
0
0
0
0
0
0
Bit/Field
31:28
27
Name
Reserved
ACG
Type
RO
R/W
Reset
0
0
Description
Reserved bits return an indeterminate value, and should
never be changed.
Auto Clock Gating
This bit specifies whether the system uses the Sleep-Mode
Clock Gating Control (SCGCn) registers (see page 85)
and Deep-Sleep-Mode Clock Gating Control (DCGCn)
registers (see page 85) if the controller enters a Sleep or
Deep-Sleep mode (respectively). If set, the SCGCn or
DCGCn registers are used to control the clocks distributed
to the peripherals when the controller is in a sleep mode.
Otherwise, the Run-Mode Clock Gating Control (RCGCn)
registers (see page 85) are used when the controller enters
a sleep mode.
The RCGCn registers are always used to control the clocks
in Run mode.
This allows peripherals to consume less power when the
controller is in a sleep mode and the peripheral is unused.
October 8, 2006
79
Preliminary