CP321 Datasheet, PDF (71/144 Pages) List of Unclassifed Manufacturers – Power PC-based CPU Board for CompactPCI Applications

CP321
Configuration
4.3.8 Control Register
The Control register provides access to the front panel general purpose LED’s (LED1R and
LED1G), allows for the generation of a software reset of the system, and is used to control the
configuration of the SER 0 (UART B) either for RS232 or RS485 operation.
Table 4-11:Control Register
REGISTER NAME
CONTROL
ACCESS
ADDRESS
0xFFE0 001A
R
W
BIT POSITION
7
6
5
4
3
2
1
0
CONTENT RS_CTL res.
res. S_RST res.
res. LED1R LED1G
DEFAULT
n/a
n/a
n/a
n/a
n/a
n/a
0
0
BIT NAME VAL
DESCRIPTION
0 LED1G (green) off
0 LED1G
1 LED1G (green) on
0 LED1R (red) off
1 LED1R
1 LED1R (red) on
2
0
reserved
1
3
0
reserved
1
0 no operation
4 S_RST
1
Causes a software reset (S_RST) to be initiated
5
0
reserved
1
6
0
reserved
1
0
Indicates that the serial interface, SER 0 (UART B), is to be configured for
RS232 operation
Indicates that the serial interface, SER 0 (UART B), is to be configured for
RS485 operation
7 RS_CTL 1
Warning!
When setting bit 7 care must be taken to
ensure that the installed interface corre-
sponds to the bit setting. A mismatch
may cause damage to the CP321 or the
application.
ID 24977, Rev. 02
© 2003 Kontron Modular Computers GmbH
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