STK16C88-3 Datasheet, PDF (7/11 Pages) List of Unclassifed Manufacturers – 32K x 8 AutoStorePlus nvSRAM 3.3V QuantumTrap CMOS Nonvolatile Static RAM

DEVICE OPERATION
STK16C88-3
The AutoStorePlus™ STK16C88-3 is a fast 32K x 8
SRAM that does not lose its data on power-down.
The data is preserved in integral QuantumTrap™
Nonvolatile Elements while power is unavailable.
The nonvolatility of the STK16C88-3 does not
require any system intervention or support:
AutoStorePlus™ on power-down and automatic
RECALL on power-up guarantee data integrity with-
out the use of batteries.
NOISE CONSIDERATIONS
Note that the STK16C88-3 is a high-speed memory
and so must have a high-frequency bypass capaci-
tor of approximately 0.1μF connected between V_CC
and V_SS, using leads and traces that are as short as
possible. As with all high-speed CMOS ICs, normal
careful routing of power, ground and signals will
help prevent noise problems.
SRAM READ
The STK16C88-3 performs a READ cycle whenever
E and G are low and W is high. The address speci-
fied on pins A_0-14 determines which of the 32,768
data bytes will be accessed. When the READ is initi-
ated by an address transition, the outputs will be
valid after a delay of t_AVQV (READ cycle #1). If the
READ is initiated by E or G, the outputs will be valid
at t_ELQV or at t_GLQV, whichever is later (READ cycle #2).
The data outputs will repeatedly respond to address
changes within the t_AVQV access time without the need
for transitions on any control input pins, and will
remain valid until another address change or until E
or G is brought high.
SRAM WRITE
A WRITE cycle is performed whenever E and W are
low. The address inputs must be stable prior to
entering the WRITE cycle and must remain stable
until either E or W goes high at the end of the cycle.
The data on the common I/O pins DQ_0-7 will be writ-
ten into the memory if it is valid t_DVWH before the end
of a W controlled WRITE or t_DVEH before the end of an
E controlled WRITE.
It is recommended that G be kept high during the
entire WRITE cycle to avoid data bus contention on
the common I/O lines. If G is left low, internal circuitry
will turn off the output buffers t_WLQZ after W goes low.
AutoStorePlus™ OPERATION
The STK16C88-3’s automatic STORE on power-
down is completely transparent to the system. The
AutoStore™ initiation takes less than 500ns when
power is lost (V_CC < V_SWITCH) at which point the part
depends only on its internal capacitor for STORE
completion. If the power supply drops faster than
20μs/volt before Vccx reaches Vswitch, then a 2.2
ohm resistor should be inserted between Vccx and
the system supply to avoid a momentary excess of
current between Vccx and Vcap.
In order to prevent unneeded STORE operations,
automatic STOREs will be ignored unless at least
one WRITE operation has taken place since the
most recent STORE or RECALL cycle. Software-
initiated STORE cycles are performed regardless of
whether or not a WRITE operation has taken place.
POWER-UP RECALL
During power up, or after any low-power condition
(V_CC < V_RESET), an internal RECALL request will be
latched. When V_CC once again exceeds the sense
voltage of V_SWITCH, a RECALL cycle will automatically
be initiated and will take t_RESTORE to complete.
If the STK16C88-3 is in a WRITE state at the end of
power-up RECALL, the SRAM data will be corrupted.
To help avoid this situation, a 10kΩ resistor should
be connected either between W and system V_CC or
between E and system V_CC.
SOFTWARE NONVOLATILE STORE
The STK16C88-3 software STORE cycle is initiated
by executing sequential READ cycles from six spe-
cific address locations. During the STORE cycle an
erase of the previous nonvolatile data is first per-
formed, followed by a program of the nonvolatile
elements. The program operation copies the SRAM
data into nonvolatile memory. Once a STORE cycle
is initiated, further input and output are disabled until
the cycle is completed.
Because a sequence of READs from specific
addresses is used for STORE initiation, it is impor-
tant that no other READ or WRITE accesses inter-
vene in the sequence or the sequence will be
aborted and no STORE or RECALL will take place.
March 2006
7 Document Control # ML0019 rev 0.2