EM488M3244LBA Datasheet, PDF (7/19 Pages) List of Unclassifed Manufacturers – 256Mb (2M×4Bank×32) Synchronous DRAM

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AC Operating Test Conditions
(V_DD=1.8V±0.1V, T_A=0°C ~70°C)
Item
Output Reference Level
Output Load
Input Signal Level
Transition Time of Input Signals
Input Reference Level
EM488M3244LBA
Conditions
0.9V/0.9V
See diagram as below
1.6V/0.2V
0.5ns
0.9V
AC Operating Test Characteristics
(V_DD=1.8V±0.1V, T_A=0°C ~70°C)
Symbol
Parameter
-75
Units
Min. Max.
CL=3 7.5
t_CK Clock Cycle Time
CL=2 10
ns
t_AC Access Time form CLK
CL=3
CL=2
6
ns
8
t_CH CLK High Level Width
2.5
ns
t_CL CLK Low Level Width
2.5
ns
CL=3 2
t_OH Data-out Hold Time
CL=2 2
ns
Data-out High Impedance ^CL=3
t_HZ
Time ^{(Note 5)}
CL=2
6
ns
8
t_LZ Data-out Low Impedance Time
0
ns
t_IH Input Hold Time
1
ns
t_IS Input Setup Time
2
ns
* All voltages referenced to V_SS.
Note 5: t_HZ defines the time at which the output achieve the open circuit condition and is not referenced to
output voltage levels.
Jul. 2006
www.eorex.com
7/19