ARM920T Datasheet, PDF (7/12 Pages) List of Unclassifed Manufacturers – System-on-Chip Platform OS Processor

The ARMv4T Architecture
The Thumb instruction set
Mnemonic
MOV
ADD
SUB
RSB
CMP
TST
AND
EOR
LSL
ASR
MUL
B
BL
BX
LDR
LDRH
LDRB
LDRSH
LDMIA
PUSH
Operation
Move
Add
Subtract
Reverse Subtract
Compare
Test
Logical AND
Logical Exclusive OR
Logical Shift Left
Arithmetic Shift Right
Multiply
Unconditional Branch
Branch and Link
Branch and Exchange
Load Word
Load Halfword
Load Byte
Load Signed Halfword
Load Multiple
Push Registers to stack
Mnemonic
MVN
ADC
SBC
RSC
CMN
NEG
BIC
ORR
LSR
ROR
BKPT
Bcc
BLX
SWI
STR
STRH
STRB
LDRSB
STMIA
POP
Operation
Move Not
Add with Carry
Subtract with Carry
Reverse Subtract with Carry
Compare Negated
Negate
Bit Clear
Logical (inclusive) OR
Logical Shift Right
Rotate Right
Breakpoint
Conditional Branch
Branch and Link and Exchange
Software Interrupt
Store Word
Store Halfword
Store Byte
Load Signed Byte
Store Multiple
Pop Registers from stack
DVI 0024A
© Copyright ARM Limited 2000. All rights reserved.
ARM Confidential - Draft
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