YSS901 Datasheet, PDF (6/14 Pages) List of Unclassifed Manufacturers – SD Stereo dipole

YSS901
3-2) Speaker arrangement angle and virtual sound position angle
3-2-1) Setting by means of DC switches: CSEL2, CSEL1, CSEL0 and CTLSEL
By setting CTLSEL to “0”, and setting CSEL 2, 1 and 0 as following, the positioning angle between the front two
speakers and the virtual sound positioning angle can be selected.
Stereo Input
stereo dipole
Speaker positioning
Virtual
CSEL2 CSEL1 CSEL0
angle (a)
sound position (b)
000
10 degrees
60 degrees
001
10 degrees
120 degrees
Real Source
010
15 degrees
60 degrees
L
R
L
Virtual Source
R
0
1
1
15 degrees
120 degrees
a
100
20 degrees
60 degrees
b
101
20 degrees
120 degrees
110
External coefficien1t downloadable
Listener
111
Through (SD effect is disabled.)
* Your original coefficients can be written by an external microprocessor.
(Technical material is under preparation)
3-2-2) Control through CPU
CSN, SCK, SI and CTLSEL
Data can be written into the control registers through the serial microcomputer interface by using three pins including
CSN, SCK and SI.
For the details of the read/write timing, refer to the format diagram shown in the next page.
3-3) Bit shift
BSFT1, BSFT0 and CTLSEL
This function is used to specify the amount of bit shift after the addition of the results of filtering.
CTLSEL = 0 enables the settings of BSF1 and BSF0.
The relation between the combinations of settings of BSF1 and BSF0 and the amount of bit shift is as shown below.
BSFT1
0
0
1
1
BSFT 0
0
1
0
1
Bit shift
None
-1 bit
-2 bit
-3 bit
CTLSEL = 1 enables the control of bit shift amount through the microcomputer interface.
4. Initial clear
RESETN
This LSI requires an initial clear at power on moment.
5. LSI test pins
TST1, TST2, TSTCK, TSTSEL, TSTNI and TSTNO
TST1, TST2 and TST0 are to be open. TSTCK, TSTSEL and TSTNI should be connected with DVSS.
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