TSE-0155-32S-P1-3 Datasheet, PDF (6/10 Pages) List of Unclassifed Manufacturers – SINGLE MODE SINGLE FIBER TRANSCEIVER

TX-1310/RX-1550 nm Single-mode Bi-directional (Single-Fiber)Transceiver
2×5 SC Simplex Connector, 3.3 V (17dB Margin)
155 Mbps ATM/SONET OC-3/SDH STM-1
Connection Diagram
Pin-Out
5 4 321
RD+ RD− SD V_CCR RX
GND
Case
TOP VIEW
TX
VCCT GND TX_DIS TD+ TD −
6 7 8 9 10
Case
PIN SYMBOL
DESCRIPTION
1 RX GND
2 V_CCR
3 SD
4 RD–
5 RD+
6 V_CCT
7 TX GND
8 TX_DIS
9 TD+
10 TD–
Receiver Signal Ground, Directly connect this pin to the receiver ground plane.
Receiver Power Supply
Provide +3.3 Vdc via the recommended receiver power supply filter circuit. Locate the power supply filter
circuit as close as possible to the V_CCR pin.
Signal Detect.
Normal optical input levels to the receiver result in a logic “1” output, V_OH, asserted. Low input optical levels
to the receiver result in a fault condition indicated by a logic “0” output V_OL, deasserted Signal Detect is a
single-ended LVPECL output. SD can be terminated with LVPECL techniques via 50Ω to V_CCR – 2 V.
Alternatively, SD can be loaded with a 180 Ω resistor to RX GND to conserve electrical power with small
compromise to signal quality. If Signal Detect output is not used, leave it open-circuited. This Signal Detect
output can be used to drive a LVPECL input on an upstream circuit, such as, Signal Detect input or Loss of
Signal-bar.
RD– is an open-emitter output circuit.
Terminate this high-speed differential LVPECL output with standard LVPECL techniques at the follow-on
device input pin. (See recommended circuit schematic)
RD+ is an open-emitter output circuit.
Terminate this high-speed differential LVPECL output with standard LVPECL techniques at the follow-on
device input pin. (See recommended circuit schematic)
Transmitter Power Supply
Provide +3.3 Vdc via the recommended transmitter power supply filter circuit. Locate the power supply filter
circuit as close as possible to the V_CCT pin.
Transmitter Signal Ground
Directly connect this pin to the transmitter signal ground plane. Directly connect this pin to the transmitter
ground plane.
Transmitter Disable
Connect this pin to +3.3V TTL logic high “1” to disable transmitter. To enable module connect to TTL logic
low “0” or open.
Transmitter Data In
Terminate this high-speed differential LVPECL input with standard LVPECL techniques at the transmitter
input pin. (See recommended circuit schematic)
Transmitter Data In-Bar
Terminate this high-speed differential LVPECL input with standard LVPECL techniques at the transmitter
input pin. (See recommended circuit schematic)
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Date : 2003/02/17