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THAT4311 Datasheet, PDF (6/12 Pages) List of Unclassifed Manufacturers – Low-voltage, Low-power Analog Engine Dynamics Processor
Page 6
Low-voltage, Analog Engine® Dynamics Processor
Preliminary Information
Decoder In
+15
C6
+
10u
R11
15k
U1B
1 IN
OUT 4
2 RMS 5
Iset TC
R8
R7
150k
20k
R9
51R
R2
56k
R3
R1
R12
261k
THAT4311 + C5
10u
8k87
6k04
C1
R6
3n3
24k3
V+
C4
+
3u3
15 14 13
R5
17
EC+ SYM
IN VCA OUT
24k3
EC-
16
_U1A
OA3 12
19 _
20
OA1
+
18
Decoder Out
U1D
THAT4311
+
THAT4311
C16 +
10u
U1E
11 Vcc Vref 9
10 Vref 8
Vee Cap
Vref R4
7k5
+ C7
THAT4311 + C2
+ C3
10u
10u
22u
Fig 16. THAT 4311 Noise Reduction Decoder Schematic
Theory of Operation
The THAT 4311 Analog Engineâ Dynamics Pro-
cessor combines THAT,s proven Voltage-Controlled
Amplifier (VCA) and RMS-Level Detector designs with
three opamps to produce a multipurpose dynamics
processor useful in a variety of applications. For de-
tails of the theory of operation of the VCA and RMS
Detector building blocks, the interested reader is re-
ferred to THAT Corporation’s data sheets on the
218x Series VCAs and the 2252 RMS-Level Detector.
Theory of the interconnection of exponen-
tially-controlled VCAs and log-responding level detec-
tors is covered in THAT Corporation’s application
note AN101, The Mathematics of Log-Based Dynamic
Processors.
The VCA - in Brief
The THAT 4311 VCA is based on THAT Corpora-
tion’s highly successful complementary log/anti-log
gain cell topology, as used in THAT’s 218x and
215x-Series IC VCAs. The THAT 4311 is integrated
using a fully complementary, BiFET process. The
combination of FETs with high-quality, complemen-
tary bipolar transistors (NPNs and PNPS) allows ad-
ditional flexibility in the design of the VCA over
previous efforts.
Input signals are currents to the VCA IN pin.
This pin is a virtual ground biased at VREF, so in
normal operation an input voltage is converted to in-
put current via an appropriately sized resistor (R5 in
Fig 2, Page 3). Because the current associated with
DC offsets relative to VREF present at the input pin
and any DC offset in preceding stages will be modu-
lated by gain changes (thereby becoming audible as
thumps), the input pin is normally AC-coupled (C4 in
Fig 2).
The VCA output signal is also a current, inverted
with respect to the input current. In normal opera-
tion, the output current is converted to a voltage via
inverter OA3, where the ratio of the conversion is de-
termined by the feedback resistor (R6, Fig 2) con-
nected between OA3’s output and its inverting input.
The signal path through the VCA and OA3 is
non-inverting.
The gain of the VCA is controlled by the voltage
applied between EC- and the combination of EC+
and SYM. Gain (in decibels) is proportional to EC-,
provided that EC+ and SYM are at VREF. The con-
stant of proportionality is -6.1mV/dB (for 5V sup-
plies) for the voltage at EC-, and 6.1mV/dB for the
voltage at EC+, and SYM
THAT Corporation; 45 Sumner Street; Milford, Massachusetts 01757-1656; USA
Tel: +1 508 478 9200; Fax: +1 508 478 0990; Web: www.thatcorp.com