TH8082 Datasheet, PDF (6/14 Pages) List of Unclassifed Manufacturers – Single LIN Bus Transceiver

TH8082
Single LIN Transceiver
Static Characteristics
(V_S = 6 to 18V, V_CC= 4.5 to 5.5V, T_A = -40 to +125°C, unless otherwise specified)
All voltages are referenced to ground (GND), positive currents are flow into the IC.
Parameter
PIN VS,VCC
Supply current, dominant
Supply current, dominant
Supply current, recessive
Supply current, recessive
V_CC undervoltage lockout
Supply current, sleep mode
PIN BUS / TRANSMITTER
Bus output voltage, dominant
Symbol Conditions
Min
Typ
I_Sd
V_S = 18V,V_CC = 5.5V, TxD=L
I_CCd
V_S = 18V,V_CC = 5.5V, TxD=L
I_Sr
V_S = 18V,V_CC = 5.5V TxD = H
8
I_CCr
V_S = 18V,V_CC = 5.5V TxD = H
20
V_{CC_UV} EN = H, TxD = L
2.75
I_Ss1
V_S = 18V,V_CC = 0V TxD open
25
V_{ol_BUS} TxD=L , I_BUS = 40mA,V_S > 7.3V
Max Unit
50
µA
1
mA
20
µA
30
µA
4.3
V
50
µA
1.2
V
Bus output voltage, recessive
V_{oh_BUS} TxD=open
0.8*
V_S + 0.7
V
Bus short circuit current
Bus input current, recessive
I_{BUS_SHORT} TxD=L , V_BUS > 1.2V, V_S > 7.3V 40
I_{BUS_leakp} TxD open ,V_BUS = Vs
-20
200
mA
20
µA
Bus reverse polarity curr., rec.
I_{BUS_leakn} Loss of GND ,V_S =12V, V_BUS=0
-1
1
mA
Bus pull up resistor
PIN BUS / RECEIVER
Bus input threshold, recessive
to dominant
Bus input threshold, dominant to
recessive
Bus input hysteresis
PIN TXD, EN
High level input voltage
Low level input voltage
TxD pull up current, high level
TxD pull up current, low level
EN pull down current, high level
EN pull down current, low level
R_{BUS_pu} TxD open, V_BUS=0
V_{ihBUS_rd}
V_{ihBUS_rd}
V_{BUS_hys}
TxD open ,
-8V<V_BUS < V_{ihBUS_rd}
TxD open ,
V_{ihBUS_rd} <V_BUS < 18V
V_ih
V_il
I_{IH_TXD}
I_{IL_TXD}
I_{IH_EN}
I_{IL_EN}
Rising edge
Falling edge
V_TxD = 4V
V_TxD = 1V
V_EN = 4V, V_CC = 0V
V_EN = 1V, V_CC = 0V
20
30
47
kΩ
0.4x V_S 0.45* V_S
V
0.55* V_S 0.6*V_S
V
20
mV
0.3* V_CC
0.7* V_CC V
V
-125
-50
-25
µA
-500
-250
-100
µA
50
125
250
µA
12
25
50
µA
Data Sheet Rev 1.0 June 2001
Page 6
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