RW1065 Datasheet, PDF (5/6 Pages) List of Unclassifed Manufacturers – 64x32 Dot Matrix LCD Controller / Driver

RW1065
64x32 Dot Matrix LCD Controller / Driver
Pin Description
(1)Power Pins
Name I/O
Description
VDD
- Connected to the +5V 0r +3V dc power. Common to the Vcc MPU power pin.
VDD2
This is the retevence power supply for the Step-up voltage circuit.
VSS
- 0V dc pin connected to the system ground.
CAP1P~3P
CAP1N~2N
- Capacitor connector pin for voltage booster.
V0~V4
Multi-level power supplies for LCD driving. The voltage determined for each liquid
-
crystal cell is divided by resistance or it is converted in impedance by the op amp,
and supplied. These voltages must satisfy the following:
V0 ≧ V1 ≧ V2 ≧ V3 ≧V4 ≧ VSS
(2)System Bus Connection Pins
Name
I/O
Description
D7 to D0
RS
I/O
The 8-bit bidirectional data buses to be connected to the 8- or 16- bit standard MCU
Data busses.
Usually connected to the low-order bit of the MPU address bus and used to identify
I
the data or a command.
RS=0: D0 to D7 are display control data.
RS=1: D0 to D7 are display data.
CLS
I CLS=1 : internal oscillator enable CLS=0 : external clock operation mode
ADCP
SHLP
BS1P,BS0P
―
RST
The pin selects the relationship between display data RAM column addresses and
segment drivers.
I _{ADCP=1: SEG0←column address 3FH,…..inverted}
ADCP=0: SEG0←column address 00H,…..normal
The pin selects the com output scan direction.
SHL=1: Reverse direction,com63→com0
I _{SHL=0: Normal com0→com63}
Both master and slave should set identical SHL value
Select LCD Bias 1/5, 1/6, 1/8, 1/9 bias
BS1P=0, BS0P=0 : 1/5 bias
I ^{BS1P=0, BS0P=1 : 1/6 bias}
BS1P=1, BS0P=0 : 1/8 bias
BS1P=1, BS0P=1 : 1/9 bias
I ^{Input low active. System reset.}
CS1BP, CS2P
E
R/W
I Input. When CS1BP = 0 and CS2P = 1 the chip select become active
For 68-series MPU : Input. Active high.
I
Used as an enable clock input of the 68-series MPU.
For 68-series MPU : Input.
I
Used as an input pin of read control signals (if R/W is high) or write control signals
signals (if low).
5
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