PE4231 Datasheet, PDF (5/7 Pages) Peregrine Semiconductor Corp. – SPDT High Power UltraCMOS - DC 1.3 GHz RF Switch

PE4231
Product Specification
Evaluation Kit
The SPDT Switch Evaluation Kit board was
designed to ease customer evaluation of the
PE4231 SPDT switch. The RF common port is
connected through a 75 Ω transmission line to the
top left BNC connector, J1. Port 1 and Port 2 are
connected through 75 Ω transmission lines to the
top two BNC connectors on the right side of the
board, J2 and J3. A through transmission line
connects BNC connectors J4 and J5. This
transmission line can be used to estimate the loss
of the PCB over the environmental conditions
being evaluated.
The board is constructed of a two metal layer FR4
material with a total thickness of 0.031”. The
bottom layer provides ground for the RF
transmission lines. The transmission lines were
designed using a coplanar waveguide with ground
plane model using a trace width of 0.021”, trace
gaps of 0.030”, dielectric thickness of 0.028”,
metal thickness of 0.0014” and ε_r of 4.4.
J6 provides a means for controlling DC and digital
inputs to the device. Starting from the lower left
pin, the second pin to the right (J6-3) is connected
to the device CNTL input. The fourth pin to the
right (J6-7) is connected to the device VDD input.
A decoupling capacitor (100 pF) is provided on
both CNTL and VDD traces. It is the responsibility
of the customer to determine proper supply
decoupling for their design application. Removing
these components from the evaluation board has
not been shown to degrade RF performance.
Figure 8. Evaluation Board Layouts
Figure 9. Evaluation Board Schematic
VDD
RF1
J6-7
100 pF
J2
Optional
J6-3
100 pF
Optional
CNTL
GND
GND
GND
RFC
RF2
J1
J3
Document No. 70-0097-01 │ www.psemi.com
J5
J4
©2005 Peregrine Semiconductor Corp. All rights reserved.
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