MXR7311GL Datasheet, PDF (5/7 Pages) List of Unclassifed Manufacturers – Low Cost, Low Noise ±2 g Dual Axis Accelerometer with Ratiometric Analog Outputs

USING THE MXR7311GL WITH OPERATING
VOLTAGES OTHER THAN 3V
The MXR7311GL is tested and specified at V_DD=3V;
however, it can be powered with V_DD as low as 2.7V or as
high as 5.25V. Some performance parameters will change
as the supply voltage is varied. The MXR7311GL output
sensitivity will be linearly proportional to supply voltage.
At 5V the output sensitivity is typically 278mV/g. The zero
g bias output is also ratiometric, so the zero g is normally
equal to V_DD/2 at all supply voltages.
EXTERNAL FILTERS
AC Coupling: For applications where only dynamic
accelerations (vibration) are to be measured, it is
recommended to ac couple the accelerometer output as
shown in Figure 3. The advantage of ac coupling is that
zero g offset variations from part to part and zero g offset
change over temperature can be eliminated. Figure 3 is a
HFP (high pass filter) with a –3dB breakpoint given by the
equation: f = ¹²_πRC . In many applications it may be
desirable to have the HFP –3dB point at a very low
frequency in order to detect very low frequency
accelerations. Sometimes the implementation of this HFP
may result in unreasonably large capacitors, and the
designer may turn to digital implementations of HFPs
where very low frequency –3dB breakpoints can be
achieved.
A_OUTX
A_OUTY
C
R
C
R
A_OUTX
Filtered
Output
A_OUTY
Filtered
Output
Figure 3: High Pass Filter
Low Pass Filter: An external low pass filter would be
useful in low frequency applications such as tilt or
inclination. The low pass filter limits the noise floor and
improves the resolution of the accelerometer. The low pass
filter shown in Figure 4 has a –3dB breakpoint given by the
equation:
f
=
1
2πRC
.
For the 200 Hz ratiometric output
device filter, C=0.1µF and R=8kΩ, ±5%, 1/8W.
A_OUTX
R
A_OUTX
Filtered
C
Output
A_OUTY
R
A_OUTY
Filtered
C
O u tp u t
Figure 4: Low Pass Filter
POWER SUPPLY NOISE REJECTION
One capacitor is recommended for best rejection of power
supply noise (reference Figure 5 below). The capacitor
should be located as close as possible to the device supply
pin (V_DD). The capacitor lead length should be as short as
possible, and surface mount capacitor is preferred. For
typical applications, the capacitor can be ceramic 0.1 µF.
Figure 5: Power Supply Noise Rejection
PCB LAYOUT AND FABRICATION SUGGESTIONS
1. Liberal use of ceramic bypass capacitors is
recommended.
2. Robust low inductance ground wiring should be used.
3. Care should be taken to ensure there is “thermal
symmetry” on the PCB immediately surrounding the
MEMSIC device and that there is no significant heat
source nearby.
4. A metal ground plane should be added directly beneath
the MEMSIC device. The size of the plane should be
similar to the MEMSIC device’s footprint and be as
thick as possible.
5. Vias can be added symmetrically around the ground
plane. Vias increase thermal isolation of the device
from the rest of the PCB.
MEMSIC MXR7311GL Rev.D
Page 5 of 5
2004.03.15