M-CAS-R80515 Datasheet, PDF (5/5 Pages) List of Unclassifed Manufacturers – 8-bit Microcontroller

R80515 Megafunction Datasheet
Verification Methods
The R80515 core’s functionality was verified by means of a proprietary hardware modeler. The same stimulus
was applied to a hardware model that contained the original Intel 80C31 and Siemens SAB80C537 chips, and the
results were compared with the core’s simulation outputs.
Device Utilization & Performance
Supported
Family
Cyclone
Stratix
Stratix-II
Device
Tested
EP1C4-6
EP1S10-5
EP2S5-3
LEs
3696
3726
3115
Utilization
Memory Memory bits
3 M4K
10,240
3 M4K
10,752
3 M4K
10,752
Notes:
1. Optimized for speed
2. Implemented with 256 bytes of RAM and 1KB of ROM
Performance
F_max
38 MHz
39 MHz
51 MHz
Deliverables
• ^{VHDL or Verilog HDL source code}
• ^{Post-synthesis EDIF netlist (netlist license)}
• ^{Testbench (self-checking)}
• ^{Vectors for testing the core}
• ^{Place & route scripts (netlist license)}
• ^{Simulation script}
• ^{Synthesis script}
• ^{Documentation}
Contact Information
CAST, Inc.
11 Stonewall Court
Woodcliff Lake, New Jersey 07677 USA
Phone: [phone]
Fax: [phone]
E-Mail: [e-mail]
URL: www.cast-inc.com
CAST, Inc.
This megafunction developed by the
processor experts at
Evatronix SA
Copyright © CAST, Inc. 2004, All Rights Reserved. Contents subject to change without notice
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