CS61577-IL1 Datasheet, PDF (5/44 Pages) List of Unclassifed Manufacturers – T1/E1 LINE INTERFACE

CS61577
T1 SWITCHING CHARACTERISTICS (TA = -40°C to 85°C; TV+, RV+ = 5.0V ±5%;
GND = 0V; Inputs: Logic 0 = 0V, Logic 1 = RV+; See Figures 1, 2, & 3)
Parameter
Symbol Min
Typ
Max
Crystal Frequency
(Note 25)
fc
- 6.176000 -
TCLK Frequency
f_tclk
-
1.544
-
ACLKI Frequency
(Note 26) faclki
-
1.544
-
RCLK Duty Cycle
(Note 27) t_pwh1/t_pw1
45
50
55
Rise Time, All Digital Outputs
(Note 28)
tr
-
-
85
Fall Time, All Digital Outputs
(Note 28)
t_f
-
-
85
TPOS/TNEG (TDATA) to TCLK Falling Setup Time
tsu2
25
-
-
TCLK Falling to TPOS/TNEG (TDATA) Hold Time
t_h2
25
-
-
RPOS/RNEG Valid Before RCLK Falling
(Note 29) tsu1
150
274
-
RDATA Valid Before RCLK Falling
(Note 30) t_su1
150
274
-
RPOS/RNEG Valid Before RCLK Rising
(Note 31) tsu1
150
274
-
RPOS/RNEG Valid After RCLK Falling
(Note 29)
t_h1
150
274
-
RDATA Valid After RCLK Falling
(Note 30)
th1
150
274
-
RPOS/RNEG Valid After RCLK Rising
(Note 31)
t_h1
150
274
-
Notes: 25. Crystal must meet specifications described in CXT6176/CXT8192 data sheet.
26. ACLKI provided by an external source or TCLK.
27. RCLK duty cycle will be 62.5% or 37.5% when jitter attenuator limits are reached.
28. At max load of 1.6 mA and 50 pF.
29. Host Mode (CLKE = 1).
30. Extended Hardware Mode.
31. Hardware Mode, or Host Mode (CLKE = 0)
32. The transmitted pulse width does not depend on the TCLK duty cycle.
Units
MHz
MHz
MHz
%
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
E1 SWITCHING CHARACTERISTICS (TA = -40°C to 85°C; TV+, RV+ = 5.0V ±5%;
GND = 0V; Inputs: Logic 0 = 0V, Logic 1 = RV+; See Figures 1, 2, & 3)
Parameter
Crystal Frequency
(Note 25)
TCLK Frequency
TCLK Duty Cycle for LEN2/1/0 = 0/0/0
(Note 32)
ACLKI Frequency
RCLK Duty Cycle
(Note 26)
(Note 27)
Rise Time, All Digital Outputs
(Note 28)
Fall Time, All Digital Outputs
(Note 28)
TPOS/TNEG (TDATA) to TCLK Falling Setup Time
TCLK Falling to TPOS/TNEG (TDATA) Hold Time
RPOS/RNEG Valid Before RCLK Falling
RDATA Valid Before RCLK Falling
(Note 29)
(Note 30)
RPOS/RNEG Valid Before RCLK Rising
RPOS/RNEG Valid After RCLK Falling
(Note 31)
(Note 29)
RDATA Valid After RCLK Falling
RPOS/RNEG Valid After RCLK Rising
(Note 30)
(Note 31)
Symbol
f_c
ftclk
t_pwh2/t_pw2
faclki
t_pwh1/t_pw1
tr
t_f
tsu2
t_h2
tsu1
t_su1
tsu1
t_h1
th1
t_h1
Min
Typ
Max
- 8.192000 -
-
2.048
-
40
50
60
-
2.048
-
45
50
55
-
-
85
-
-
85
25
-
-
25
-
-
100
194
-
100
194
-
100
194
-
100
194
-
100
194
-
100
194
-
Units
MHz
MHz
%
MHz
%
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
DS155PP2
5