BQ2004 Datasheet, PDF (5/15 Pages) Texas Instruments – Fast-Charge IC

bq2004
The valid temperature range is VHTF < VTEMP < VLTF,
where:
VLTF = 0.4 ∗ VCC ± 30mV
VHTF = [(1/4 ∗ VLTF) + (3/4 ∗ VTCO)] ± 30mV
Note: The low temperature fault (LTF) threshold is not
enforced if the IC is configured for PVD termination
(VSEL = high).
VTCO is the voltage presented at the TCO input pin, and is
configured by the user with a resistor divider between VCC
and ground. The allowed range is 0.2 to 0.4 ∗ VCC.
If the temperature of the battery is out of range, or the
voltage is too low, the chip enters the charge pending
state and waits for both conditions to fall within their al-
lowed limits. The MOD output is modulated to provide
the configured trickle charge rate in the charge pending
state. There is no time limit on the charge pending
state; the charger remains in this state as long as the
voltage or temperature conditons are outside of the al-
lowed limits. If the voltage is too high, the chip goes to
the battery absent state and waits until a new charge
cycle is started.
Fast charge continues until termination by one or more
of the six possible termination conditions:
n Delta temperature/delta time (∆T/∆t)
n Peak voltage detection (PVD)
n Negative delta voltage (-∆ V)
n Maximum voltage
n Maximum temperature
n Maximum time
PVD and - V Termination
The bq2004 samples the voltage at the BAT pin once
every 34s. When -∆V termination is selected, if VCELL is
lower than any previously measured value by 12mV
±4mV (6mV/cell), fast charge is terminated. When PVD
termination is selected, if VCELL is lower than any previ-
VSEL Input
Low
Float
High
Voltage Termination
Disabled
-∆V
PVD
ously measured value by 6mV ±2mV (3mV/cell), fast
charge is terminated. The PVD and -∆V tests are valid
in the range 0.4 ∗ VCC < VCELL < 0.8 ∗ VCC.
Voltage Sampling
Each sample is an average of voltage measurements
taken 57µs apart. The IC takes 32 measurements in
PVD mode and 16 measurements in -∆V mode. The re-
sulting sample periods (9.17ms and 18.18ms, respec-
tively) filter out harmonics centered around 55Hz and
109Hz. This technique minimizes the effect of any AC
line ripple that may feed through the power supply from
either 50Hz or 60Hz AC sources. Tolerance on all tim-
ing is ±16%.
Voltage Termination Hold-off
A hold-off period occurs at the start of fast charging.
During the hold-off period, -∆V termination is disabled.
This avoids premature termination on the voltage
spikes sometimes produced by older batteries when
fast-charge current is first applied. ∆T/∆t, maximum
voltage and maximum temperature terminations are
not affected by the hold-off period.
T/ t Termination
The bq2004 samples at the voltage at the TS pin every
34s, and compares it to the value measured two samples
earlier. If VTEMP has fallen 16mV ±4mV or more, fast
charge is terminated. If VSEL = high, the ∆T/∆t termi-
nation test is valid only when VTCO < VTEMP < VTCO +
0.2 ∗ VCC. Otherwise the ∆T/∆t termination test is valid
only when VTCO < VTEMP < VLTF.
Temperature Sampling
Each sample is an average of 16 voltage measurements
taken 57µs apart. The resulting sample period
(18.18ms) filters out harmonics around 55Hz. This tech-
nique minimizes the effect of any AC line ripple that
may feed through the power supply from either 50Hz or
60Hz AC sources. Tolerance on all timing is ±16%.
Maximum Voltage, Temperature, and Time
Anytime VCELL rises above VMCV, the LEDs go off and
charging ceases immediately. If VCELL then falls back be-
low VMCV before tMCV = 1.5s ±0.5s, the chip transitions to
the Charge Complete state (maximum voltage termina-
tion). If VCELL remains above VMCV at the expiration of
tMCV, the bq2004 transitions to the Battery Absent state
(battery removal). See Figure 4.
Maximum temperature termination occurs anytime
VTEMP falls below the temperature cutoff threshold
VTCO. Unless PVD termination is enabled (VSEL =
high), charge will also be terminated if VTEMP rises
above the low temperature fault threshold, VLTF, after
fast charge begins. The VLTF threshold is not enforced
when the IC is configured for PVD termination.
Maximum charge time is configured using the TM pin.
Time settings are available for corresponding charge
rates of C/4, C/2, 1C, and 2C. Maximum time-out termi-
nation is enforced on the fast-charge phase, then reset,
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