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ACD80800 Datasheet, PDF (5/19 Pages) List of Unclassifed Manufacturers – Address Resolution Logic (8K MAC Addresses)
Lookup Engine of ACD80800. The Address Lookup
Engine checks if the destination address matches with
any existing address in the address table. If it does,
ACD80800 returns the associated Port ID to ACD’s
switch controller through the output data bus. Other-
wise, a no match result is passed to ACD’s switch con-
troller through the output data bus.
CPU Interface
ACD80800 provides a direct input/output type of inter-
face for a management CPU to access various kind of
registers inside ACD80800. The interface has 8-bit data
bus, and 5-bit address bus. The timing of read and
write operation is controlled by output enable signal and
write enable signal. For details of CPU interface timing
information, refer to the section of “Timing Descrip-
tion.”
The CPU can also choose to access the registers of
ACD80800 by sending commands to the UART data
input line. Each command is consisted by action (read
or write), register type, register index, and data. Each
result of command execution is returned to the CPU
through the UART data output line.
CPU Interface Registers
ACD80800 provides a bunch of registers for the control
CPU. Through the registers, the CPU can read all ad-
dress entries of the address table, delete particular ad-
dresses from the table, add particular addresses into
the table, secure an address from being changed, set
filtering on some addresses, change the hashing algo-
rithm etc. Through a proper interrupt request signal, the
CPU can be notified whenever it needs to retrieve data
for a newly-learned address or an aged-out address so
that the CPU can build an exact same address table
learned by ACD80800.
CPU Interface Engine
The command sent by the control CPU is executed by
the CPU Interface Engine. For example, the CPU may
send a command to learn the first newly-learned ad-
dress. The CPU Interface Engine is responsible to find
the newly-learned address from the address table, and
passes it to CPU. The CPU may request to learn next
newly-learned address. Then, it is again the responsi-
bility of the CPU Interface Engine to search for next
newly-learned address from the address table.
Address Table
The address table can hold up to 8K MAC addresses,
together with the associated port ID, security flag, filter-
ing flag, new flag, aging information etc. The address
table resides in the embedded SRAM inside ACD80800.
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