LM3S6916 Datasheet, PDF (427/535 Pages) List of Unclassifed Manufacturers – Microcontroller

LM3S6916 Microcontroller
Register 16: Ethernet PHY Management Register 0 – Control (MR0), address
0x00
This register enables software to configure the operation of the PHY. The default settings of these
registers are designed to initialize the PHY to a normal operational mode without configuration.
Ethernet PHY Management Register 0 – Control (MR0)
Base 0x4004.8000
Address 0x00
Type R/W, reset 0x3100
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
RESET LOOPBK SPEEDSL ANEGEN PWRDN ISO RANEG DUPLEX COLT
reserved
Type R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
1
1
0
0
0
1
0
0
0
0
0
0
0
0
Bit/Field
15
14
13
12
11
10
9
8
Name
RESET
LOOPBK
SPEEDSL
ANEGEN
PWRDN
ISO
RANEG
DUPLEX
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
1
1
0
0
0
1
Description
Reset Registers
When set, resets the registers to their default state and reinitializes
internal state machines. Once the reset operation has completed, this
bit is cleared by hardware.
Loopback Mode
When set, enables the Loopback mode of operation. The receive circuitry
is isolated from the physical medium and transmissions are sent back
through the receive circuitry instead of the medium.
Speed Select
1: Enables the 100 Mb/s mode of operation (100BASE-TX).
0: Enables the 10 Mb/s mode of operation (10BASE-T).
Auto-Negotiation Enable
When set, enables the Auto-Negotiation process.
Power Down
When set, places the PHY into a low-power consuming state.
Isolate
When set, isolates transmit and receive data paths and ignores all
signaling on these buses.
Restart Auto-Negotiation
When set, restarts the Auto-Negotiation process. Once the restart has
initiated, this bit is cleared by hardware.
Set Duplex Mode
1: Enables the Full-Duplex mode of operation. This bit can be set by
software in a manual configuration process or by the Auto-Negotiation
process.
0: Enables the Half-Duplex mode of operation.
November 30, 2007
427
Preliminary