THAT2151 Datasheet, PDF (4/10 Pages) List of Unclassifed Manufacturers – IC Voltage-Controlled Amplifiers

Page 4
2150 Series IC VCAs
Theory of Operation
The THAT 2150 Series VCAs are designed for high
performance in audio-frequency applications requiring
exponential gain control, low distortion, wide dynamic
range and low dc bias modulation. These parts control
gain by converting an input current signal to a bipolar
logged voltage, adding a dc control voltage, and re-con-
verting the summed voltage back to a current through
a bipolar antilog circuit.
Figure 6 presents a considerably simplified internal
circuit diagram of the IC. The ac input signal current
flows in pin 1, the input pin. The internal op amp
works to maintain pin 1 at a virtual ground potential
by driving the emitters of Q1 and (through the Voltage
Bias Generator) Q3. For positive input currents (Iin de-
fined as flowing into pin 1), the op amp drives the emit-
ter of Q1 negative, turning off its collector current,
while simultaneously driving the emitter of Q3 nega-
VT
is
the
thermal
voltage,
kT;
q
IC3
is
the
collector
cur-
rent of Q3; and IS is the reverse-saturation current of
Q3. It is assumed that D3 matches Q3 (and will be as-
sumed that they match Q4 and D4, as well).
In typical applications (see Figure 3, Page 3), pin 4
is connected to a voltage source at ground or nearly
ground potential. Pin 8 is connected to a virtual
ground (usually the inverting input of an op amp with
negative feedback around it). With pin 4 near ground,
and pin 8 at virtual ground, the voltage at the cathodes
of D3 and D4 will cause an exponentially-related cur-
rent to flow in D4 and Q4, and out via pin 8. A similar
equation governs this behavior:
V₃ = E_C+ − 2V_T ln ^{I}_I^C_S4^{}.
-
+
D1
D2
Ec+ ^{2 Q1}
IN ¹
Q3
Iin
Voltage
Bias
Generator
D3
Q2 3
Ec-
8
OUT
Q4 4
Ec+
(SYM)
D4
V3
V- 5
Figure 6. Simplified Internal Circuit Diagram
tive, turning it on. The input signal current, therefore,
is forced to flow through Q3 and D3.
Logging & Antilogging
Because the voltage across a base-emitter junction
is logarithmic with collector current, the voltage from
the base of Q3 to the cathode of D3 is proportional to
the log of the positive input current. The voltage at the
cathodes of D3 and D4 is therefore proportional to the
log of the positive input currents plus the voltage at
pin 3, the negative control port. Mathematically,
V₃
=
E_C−
−
2V_T
ln
IC3


I_S


,
where V3 is the voltage at the junction of D3 and D4;
Exponential Gain Control
The similarity between the two preceeding equations
begs further exploration. Accordingly:
V₃
=
E_C+
−
2V_T
ln
IC4


I_S


=
E_C−
−
2V_T
ln
IC3


I_S


EC+
−
EC−
=
2VT
ln
I_IC_S4
−
2VT
ln



IC3
IS



= 2VT ln ^{IICC43} .
Rearranging terms,
EC+−EC−
IC4 = IC3 e 2VT .
If pin 3 and pin 4 are at ground potential, the cur-
rent in Q4/D4 will precisely mirror that in Q3/D3.
When pin 3 is positive with respect to pin 4, the voltage
across the base-emitter junction of Q3 is higher than
that across the base-emitter junction of Q4, so the
Q4/D4 current remains proportional to, but less than,
the current in Q3/D3. In the same manner, a negative
voltage at pin 3 with respect to pin 4 causes the
Q4/D4 current to be proportional to, but greater than
that in Q3/D3.
The ratio of currents is exponential with the differ-
ence in the voltages EC+ and EC–, providing convenient
“deci-linear” control. Mathematically, this is:
A_V
=
IC4
I_C3
=
e
E_C+−E_C−
2VT ,
where
AV
is
the
current
gain.
For pin 4 at or very near ground, at room tempera-
ture (25˚C), allowing for a 10˚C internal temperature
rise, and converting to a base of 10 for the exponential,
this reduces to:
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