S80016LK7 Datasheet, PDF (4/9 Pages) List of Unclassifed Manufacturers – SYVCHRONOUS DRAM

128Mb: x4, x8, x16
SDRAM 3.3V
AC ELECTRICAL CHARACTERISTICS: Vdd = 3.3V ± 10%V, Temp. = 25° to 70°C
AC CHARACTERISTICS
-75A -75A
-8A
PARAMETER
SYMBOL MIN MAX MIN
Access time from CLK (positive edge) CL = 3
tAC
5.4
Access time from CLK (positive edge) CL = 2
tAC
N/A
Address hold time
tAH
0.8
1
Address setup time
tAS
1.5
2
CLK high level width
tCH
2.5
3
CLK low level width
tCL
2.5
3
Clock cycle time CL = 3
tCK
7.5
10
Clock cycle time CL = 2
tCK
N/A
CKE hold time
tCKH
0.8
1
CKE setup time
tCKS
1.5
2
CS#, RAS#, CAS#, WE#, DQM hold time
tCMH
0.8
1
CS#, RAS#, CAS#, WE#, DQM setup time
tCMS
1.5
2
Data-in hold time
tDH
0.8
1
Data-in setup time
tDS
1.5
2
Data-out high impedance time
tHZ
9
Data-out low impedance time
tLZ
1
2
Data-out hold time
tOH
2.7
3
ACTIVE to PRECHARGE command period
tRAS
44
16K
50
AUTO REFRESH to ACTIVE command period
tRC
60
80
ACTIVE to READ or WRITE delay
tRCD
22.5
30
Refresh period (4096 cycles)
tREF
64
PRECHARGE command period
tRP
22.5
30
ACTIVE bank A to bank B command period
tRRD
15
20
Transition time
tT
0.3
2
0.3
Write recovery time
tWR
20
20
Exit SELF REFRESH to ACTIVE command
tXSR
8
8
READ/WRITE command to READ/WRITE command
tCCD
1
1
CKE to clock disable or power down entry mode
tCKED
1
1
CKE to clock enable or power down exit setup
tPED
1
1
-8A
MAX
6
9
16K
64
2
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
ns
ns
ns
ns
tCK
tCK
tCK
tCK
NOTES
4
3
1
2
2
AC ELECTRICAL CHARACTERISTICS: Vdd = 3.3V ± 10%V, Temp. = 25° to 70°C
AC CHARACTERISTICS
-75A -75A
-8
PARAMETER
DQM to input data delay
SYMBOL
tDQD
MIN
0
MAX
MIN
0
WRITE command to input data delay
tDWD
0
0
Data-in to ACTIVATE command w/ Auto precharge
tDAL
5
5
Data-in to precharge
tDPL
2
2
Last data-in to precharge command
tRDL
2
2
LOAD MODE REGISTER command to command
tMRD
2
2
Data-out to high impedance from precharge
tROH
3
3
-8
MAX
UNITS
tCK
tCK
tCK
tCK
tCK
tCK
tCK
NOTES
1
1
3
2, 3
1
1
1
NOTES:
1. Clocks required specified by JEDEC functionality and not dependent on any timing parameter.
2. Timing actually specified by tCKS, clock(s) specified as a reference only at a minimum cycle rate.
3. Timing actually specified by tWR plus tRP clock(s) specified as a reference only at a minimum cycle rate.
4. tHZ defines the time at which the output achieves the open circuit condition; it is not a reference to Voh or Vol. The last valid data
element will meet tOH before going high-Z.
5. Based on tCK = 10ns for –8 and tCK = 7.5ns for –75a
PDF: 09005aef807827f6 / Source: 09005aef807825bd
128Mb SDRAM
Rev: 11/29/2004
4
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