NX29F010 Datasheet, PDF (4/25 Pages) List of Unclassifed Manufacturers – 1M-BIT (128K x 8-bit) CMOS, 5.0V Only ULTRA-FAST SECTORED FLASH MEMORY

NX29F010
BUS OPERATIONS
Table 2. Device Bus Operations^{(1, 2)}
Operation
CE
OE
WE Address(A16-A0)
Read
Write
Standby
Output Disable
L
L
H
AIN
L
H
L
AIN
VCC ± 0.5V
X
X
X
L
H
H
X
Notes:
1. L = VIL , H = VIH , X = Don't care, AIN = Address In.
2. The sector protect and sector unprotect functions must be implemented via programming equipment.
See the Sector Protection/Unprotection section.
DQ0-DQ7
Data Out
Data In
High-Z
High-Z
Requirements for Reading Array Data
Upon device power-up, or after a hardware reset, the internal
state machine is set for reading array data. This ensures
that no spurious alteration of the memory content occurs
during the power transition. No command is necessary in
this mode to obtain array data. Standard microprocessor
read cycles that assert valid addresses on the device
address inputs produce valid data on the device data
outputs. The device remains enabled for read access until
the command register contents are altered.
The system must drive the CE and OE pins to VIL to read
array data from the outputs. CE is the power control and
selects the device. OE is the output control that passes
array data to the output pins. During a READ operation, WE
must remain at VIH.
Write Commands/Command Sequences
The system must drive WE and CE to VIL, and OE to VIH to
write a command or command sequence (which includes
programming data to the device and erasing sectors of
memory).
An erase operation can erase one sector, multiple sectors,
or the entire device. The Sector Address Table (see Table 3)
indicate the address space that each sector occupies. A
"sector address" consists of the address bits required to
uniquely select a sector. See the "Command Definitions"
section for details on erasing a sector or the entire chip.
Table 3. Sector Addresses Table
Sector
Sector A0
Sector A1
Sector A2
Sector A3
Sector A4
Sector A5
Sector A6
Sector A7
A16 A15 A14
000
001
010
011
100
101
110
111
Address Range
00000H-03FFFH
04000H-07FFFH
08000H-0BFFFH
0C000H-0FFFFH
10000H-13FFFH
14000H-17FFFH
18000H-1BFFFH
1C000H-1FFFFH
After the system writes the auto-select command
sequence, the device enters the auto-select mode. The
system can then read auto-select codes from the internal
register (which is separate from the memory array) on
DQ7-DQ0. Standard read cycle timings apply in this mode.
Refer to the "Auto-select Mode and Auto-select Command
Sequence" sections for more information.
Program and Erase Operation Status
By reading the status bits on DQ7-DQ0, the system may
check the status of the operation during an erase or program
operation.
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NexFlash Technologies, Inc.
NXPF001F-0600
06/22/00 ©