N3004 Datasheet, PDF (4/7 Pages) List of Unclassifed Manufacturers – 5 Bit Programmable Synchronous Buck Converter with Dual LDOs

NIKO-SEM
5 Bit Programmable Synchronous
Buck Converter with Dual LDOs
N3004
PIN DEFINITIONS
Pin # Pin Name
Pin Function Description
1
C_T
The oscillator frequency is programmed by connecting an external cap-
acitor from this pin to GND. Operation in range of 50 KHz to 500 KHz.
2
L_IN1 Gate drive output regulator, Linear 1 for GTL+ or Clock supply.
3
V_FB1 Feedback input for L_IN1.
4
V_FB2 Feedback input for L_IN2.
5
V5 5V supply voltage.
6
PGD* Open collector logic output, high if V_O within 10% of set point.
7
CS-
Current sense input (Negative), connected to the Source of the power
MOSFET for the core supply.
Current sense input (Positive), connected to the Drain of the power MOS-
FET for the core supply. An external resistor programs the C.S threshold
8
CS+ depending on the R_DS(ON) of the power MOSFET. An external capacitor is
placed in parallel with the programming resistor to provide high frequency
noise filtering.
9
H_DRV High side driver output.
This pin serves as the ground pin and must be connected directly to the
10
GND ground plane. A high frequency capacitor (0.1 to 1μF) must be connected
directly from V5 and V12 pins to this pin for noise free operation.
11
L_DRV Low side driver output.
12V supply voltage for LINEAR section. A high frequency capacitor (0.1 to
12
V12 1μF) must be connected directly from this pin to GND pin in order to
supply the peak current to the power MOSFET during the transients.
This pin provides the soft start for the switching regulator. An internal
current source charges an external capacitor that is connected from this
13
SS pin to the GND which ramps up the outputs of the switching regulator,
preventing the outputs from overshooting as well as limiting the input
current. The second function of the soft start cap is to provide long off time
(HICCUP) for the synchronous MOSFET during current limiting.
14
V_FB3 Feedback input for V_CORE.
15 VID4* Programming input (MSB).
16 VID3* Programming input.
17 VID2* Programming input.
18 VID1* Programming input.
19 VID0* Programming input (LSB).
20
L_IN2 Gate drive output regulator, Linear 2 for GTL+ or Clock supply.
* : All logic level inputs and outputs are open collector TTL compatible.
4
JAN-10-Y02