MLX90109 Datasheet, PDF (4/9 Pages) List of Unclassifed Manufacturers – 125kHz RFID Integrated Transceiver

MLX90109
125kHz RFID Integrated Transceiver
General Description
The MLX90109 is designed for use with a parallel
antenna. This set up requires Qantenna times less
current compared to traditional serial antennas, for
building up the same magnetic field strength. Draw
back is that the voltage swing (Vpp) is limited by the
applied supply voltage.
Vppmax ~ 2* VDD.
In practice the antenna driver on the COIL pin limits
the voltage swing some more.
The MODU pin can regulate Vpp. The voltage level
on MODU defines the reference level of the antenna
voltage, as follows
Vpp ~ 2*(VDD-VMODU)
See specifications for VMODU values.
Oscillator
The oscillator frequency is locked on the antenna
frequency. The clock of the filter is derived from the
oscillator. In this way the filter characteristics are
locked to the transmission frequency. Consequently
the MLX90109 is not sensitive to zero modulation.
Power Down
By setting V_MODU = VDD, Antenna Voltage will fade to
0. At that moment MLX90109 stops oscillations,
setting the device in power down mode. Wake up
time depends on Qantenna, such that increased Q,
will lead to increased wake up time.
Write operation
Not only is the MODU pin used to set the carrier
amplitude, it can also be used to put modulation on
the carrier for write operations.
Taking into account the transfer function of the
regulation mechanism, a correction network is
required to compensate for the system poles and
zeroes. These poles and zero depend not only on
internal parameters, but also on the antenna
parameters.
See annex for calculating the correction network.
Amplitude detection
The amplitude demodulator of the transceiver detects
the AM signal generated by the tag. This signal is
filtered and amplified by an on-chip switched capacitor
filter before feeding it to the digital decoder. The
same signal is used to control the antenna voltage.
Filter settings
By setting the SPEED pin to VDD or to GND the
filtering characteristics are optimized for either 2kbaud
or 4kbaud respectively.
Digital decoding
The MODE pin allows to define whether to issue
directly the filtered data stream on the DATA pin
(MODE floating), or to have the MLX90109 decoding
Manchester (MODE = VDD) or biphase (MODE =
VSS) data.
In the decoding mode, the digital receiver gets the
filtered data stream and issues the tag data on the
DATA pin at the rising edge of the clock, which is
issued on the CLOCK pin. Both CLOCK and DATA
are open drain outputs and require external pull-ups.
Remark that the clockwidth and duty cycle can vary
from bit to bit, between a half and one and a half bit
periods on the tag coil especially in manchester mode.
VSS
FLOAT (*)
SPEED 4kBaud
-
MODE Biphase No decoding
(*) Internally strapped to VDD/2
VDD
2kBaud
Manchester
Noise cancellation
Capacitance C2 should always be connected to VDD.
Noise on VDD is coupled through to MODU,
optimizing the power supply rejection ration (PSRR)
through internal cancellation. This improves
sensitivity in noisy environments. Maximum
precautions should however be taken to minimize
noise level, to benefit from the reader sensitivity, and
obtain the maximum reading distances.
MLX90109 Parallel Resonant transceiver
Page 4 of 9
Rev 1.4 19-Dec-00