3D7105 Datasheet, PDF (4/4 Pages) Data Delay Devices, Inc. – MONOLITHIC 5-TAP FIXED DELAY LINE (SERIES 3D7105)

3D7105
SILICON DELAY LINE AUTOMATED TESTING
TEST CONDITIONS
INPUT:
Ambient Temperature: 25^oC ± 3^oC
Supply Voltage (Vcc): 5.0V ± 0.1V
Input Pulse:
High = 3.0V ± 0.1V
Low = 0.0V ± 0.1V
Source Impedance: 50Ω Max.
Rise/Fall Time:
3.0 ns Max. (measured
between 0.6V and 2.4V )
Pulse Width:
PW_IN = 1.25 x Total Delay
Period:
PER_IN = 2.5 x Total Delay
OUTPUT:
R_load:
C_load:
Threshold:
10KΩ ± 10%
5pf ± 10%
1.5V (Rising & Falling)
Device
Under
Test
10KΩ
470Ω
Digital
Scope
5pf
NOTE: The above conditions are for test only and do not in any way restrict the operation of the device.
COMPUTER
SYSTEM
PRINTER
PULSE
GENERATOR
OUT
TRIG
OUT1
DEVICE UNDER OUT2
IN
TEST (DUT)
OUT3
OUT4
OUT5
REF
IN
DIGITAL SCOPE/
TRIG ^{TIME INTERVAL COUNTER}
Figure 2: Test Setup
t_RISE
PW_IN
PER_IN
t_FALL
INPUT
2.4V
V_IH
2.4V
SIGNAL
1.5V
0.6V
1.5V
0.6V
V_IL
t_PLH
t_PHL
OUTPUT
SIGNAL
V_OH
1.5V
1.5V
V_OL
Figure 3: Timing Diagram
Doc #96006
DATA DELAY DEVICES, INC.
4
12/2/96
Tel: [phone] Fax: [phone] http://www.datadelay.com