LM3S300 Datasheet, PDF (303/378 Pages) List of Unclassifed Manufacturers – Microcontroller

LM3S300 Microcontroller
TPR = (System Clock / (2 * (SCL_LP + SCL_HP) * SCL_CLK)) - 1;
TPR = (20MHz / (2 * (6 + 4) * 100000)) - 1;
TPR = 9
Write the I2CMTPR register with the value of 0x0000.0009.
6. Specify the slave address of the master and that the next operation will be a Send by writing
the I2CMSA register with a value of 0x0000.0076. This sets the slave address to 0x3B.
7. Place data (byte) to be sent in the data register by writing the I2CMDR register with the desired
data.
8. Initiate a single byte send of the data from Master to Slave by writing the I2CMCS register with
a value of 0x0000.0007 (STOP, START, RUN).
13.4
9. Wait until the transmission completes by polling the I2CMCS register’s BUSBSY bit until it has
been cleared.
I²C Register Map
Table 13-2 on page 303 lists the I²C registers. All addresses given are relative to the I²C base
addresses for the master and slave:
■ I²C Master 0: 0x4002.0000
■ I²C Slave 0: 0x4002.0800
Table 13-2. Inter-Integrated Circuit (I²C) Interface Register Map
Offset Name
I²C Master
0x000 I2CMSA
0x004 I2CMCS
0x008 I2CMDR
0x00C I2CMTPR
0x010 I2CMIMR
0x014 I2CMRIS
0x018 I2CMMIS
0x01C I2CMICR
0x020 I2CMCR
I²C Slave
0x000 I2CSOAR
0x004 I2CSCSR
0x008 I2CSDR
0x00C I2CSIMR
Type
Reset
Description
R/W
0x0000.0000 I2C Master Slave Address
R/W
0x0000.0000 I2C Master Control/Status
R/W
0x0000.0000 I2C Master Data
R/W
0x0000.0001 I2C Master Timer Period
R/W
0x0000.0000 I2C Master Interrupt Mask
RO
0x0000.0000 I2C Master Raw Interrupt Status
RO
0x0000.0000 I2C Master Masked Interrupt Status
WO
0x0000.0000 I2C Master Interrupt Clear
R/W
0x0000.0000 I2C Master Configuration
R/W
0x0000.0000 I2C Slave Own Address
RO
0x0000.0000 I2C Slave Control/Status
R/W
0x0000.0000 I2C Slave Data
R/W
0x0000.0000 I2C Slave Interrupt Mask
See
page
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October 01, 2007
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Preliminary