WT6016 Datasheet, PDF (3/24 Pages) List of Unclassifed Manufacturers – Digital Monitor Controller

FUNCTIONAL DESCRIPTION
WT6016
Digital Monitor Controller
Ver. 1.51 Jul-31-1998
CPU
The CPU core is 6502 compatible, operating frequency is 4MHz. Address bus is 16-bit and data bus is
8-bit. the non-maskable interrupt (/NMI) of 6502 is changed to maskable interrupt and is defined as
the INT0. The interrupt request (/IRQ) of 6502 is defined as the INT1.
Default stack pointer is 01FFH.
Please refer the 6502 reference menu for more detail.
ROM
16384 bytes maskable ROM is provided for program codes.
Address is located from C000H to FFFFH.
The following addresses are reserved for special purpose :
FFFAH (low byte) and FFFBH (high byte) : INT0 interrupt vector.
FFFCH (low byte) and FFFDH (high byte) : program reset vector.
FFFEH (low byte) and FFFFH (high byte) : INT1 interrupt vector.
RAM
Built-in 288 bytes SRAM, address is located from 0080H to 019FH. Because the initial stack pointer
is 01FFH, so program must set proper stack pointer when program starts. A recommended value is
019FH.
0000H
:
0020H
0021H
:
007FH
0080H
:
019FH
01A0H
:
BFFFH
C000H
:
:
:
FFFFH
REGISTERS
Reserved
RAM
Reserved
ROM
Low VDD Voltage Reset
A VDD voltage detector is built inside the chip. When VDD is below 4.0 volts, the whole chip will be
reset just like power-on-reset.
Note that the 4.0 volts varies with temperature and process. Please refer the electrical characteristics.
Weltrend Semiconductor, Inc.
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