KAD5512HP Datasheet, PDF (27/31 Pages) List of Unclassifed Manufacturers – High Performance 12-Bit, 250/210/170/125MSPS ADC

KAD5512HP
Equivalent Circuits
Figure 47. Analog Inputs
AVDD
Figure 51. LVDS Outputs
AVDD
CLKP
11kΩ
AVDD
18kΩ
To
Charge
Pipeline
Figure 52. CMOS Outputs
AVDD _11kΩ
CLKN
18kΩ
Figure 48. Clock Inputs
Figure 49. Tri-Level Digital Inputs
Figure 50. Digital Inputs
Rev 0.5 Preliminary
Figure 53. VCM_OUT Output
Layout Considerations
Split Ground and Power Planes
Data converters operating at high sampling frequen-
cies require extra care in PC board layout. Many
complex board designs benefit from isolating the
analog and digital sections. Analog supply and
ground planes should be laid out under signal and
clock inputs. Locate the digital planes under outputs
and logic pins. Grounds should be joined under the
chip.
Clock Input Considerations
Use matched transmission lines to the transformer in-
puts for the analog input and clock signals. Locate
transformers and terminations as close to the chip as
possible.
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