EM6521 Datasheet, PDF (25/68 Pages) List of Unclassifed Manufacturers – 4 bit Microcontroller

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EM6521
Figure 17 Shift Operation and IRQ Generation
SCLK = System Clock;
Active Edge = Neg. Edge; Sense = MSB First
Clock Source
Shift Ck
Start
IRQ
Shift
Register
10010011
SIN
0
1
0
0
1
1
0
OM[1]=0, OM[0]=1 : Re-Synchronized on positive SCLK clock edge data out
SOUT
1
0
0
1
0
0
1
OM[1]=1, OM[0]=0 : direct data out on pos. or neg. SCLK clock edge depending on bit POSnNeg
SOUT
1
0
0
1
0
0
1
01001100
0
1
1
6.6.7 Reset and Sleep on Port SP
During circuit initialization, all option registers are reset by Power On Reset and therefore all pull-ups are off
and all pull-downs are on. During Sleep mode, Port SP inputs are cut-off , the circuit is in Reset State. However
the Reset State does not reset the option registers and pull-downs, if previously turned on, remain on even
during Sleep mode. After any reset the serial interface parameters are reset to : Slave mode, Start and Status
= 0, LSB first, negative edge shift , PSP[3:0] tristate.
Note : A write operation in the control registers or in the data registers while Start is high will change internal
values and may cause an error condition. The user must take care of the serial interface status before writing
internal registers. In order to read the correct values on the data registers, the shift operation must be halted
during the read accesses.
Figure 18. Sample Basic Serial Port Connections
Master Mode
EM6521
SP[3]; SCLKOut
SP[2]; SOUT
SP[0]; SIN
Ready
SP[1]: Status
External
Serial Clock In
Serial Data In
Serial Data Out
Status Output
CS
Slave Mode
EM6521
SP[3]; SCLKIn
SP[2]; SOUT
SP[0]; SIN
SP[1]; Status
External
Serial Clock Out
Serial Data In
Serial Data Out
Ready
optional connection
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