DM9801 Datasheet, PDF (24/61 Pages) List of Unclassifed Manufacturers – 1M home Phonrline Network Physical Layer Single Chip Transceiver

DM9801
1M Home Phoneline Network Physical Layer Single Chip Transceiver
Basic Mode Control Register (BMCR) - Register 0
Bit
Bit Name
Default
Description
0.15
Reset
0, RW/SC Reset:
1=Software reset
0=Normal operation
When set this bit configures the PHY status and control
registers to their default states. This bit will return a value of
one until the reset process is complete
0.14
Loopback
0, RW
Loopback:
Loopback control register
1=Loopback enabled
0=Normal operation
0.13 Speed Selection 0, RO/P
Speed Select:
The DM9801 does not support this function. This bit is
permanently set to 0
0.12 Auto-negotiation
Enable
0,RO/P
Auto-negotiation Enable:
The DM9801 does not support this function. This bit is
permanently set to 0
0.11
Power Down
0,RW
Power Down:
1=Power down enabled
0=Normal operation
Setting this bit will power down the DM9801 with the exception
of the crystal oscillator circuit.
0.10
Isolate
0,RW
Isolate:
1= Isolate
0= Normal Operation
When this bit is set the data path will be isolated from the MII
interface. TX_CLK, RX_CLK, RX_DV, RXD[3:0], COL and CRS
will be placed in a high impedance state. The management
interface is not effected by this bit. When the PHY address is
set to 00000 the isolate bit will be set upon power-up/reset.
0.9
Restart Auto-
negotiation
0,RO/P
Restart Auto-negotiation:
The DM9801 does not support this function. This bit is
permanently set to 0
0.8
Duplex Mode
0,RO/P
Duplex Mode:
The DM9801 does not support this function. This bit is
permanently set to 0
0.7
Collision Test
0,RO/P
Collision Test:
The DM9801 does not support this function. This bit is
permanently set to 0
0.6-0.0
Reserved
0,RO
Reserved:
Write as 0, ignore on read
24
Preliminary
Version: DM9801-DS-P02
March 20, 2000