CXD3423GA Datasheet, PDF (22/54 Pages) List of Unclassifed Manufacturers – Timing Generator and Signal Processor for Frame Readout CCD Image Sensor

CXD3423GA
Detailed Description of Each Data
Shared data: D08 CTG [Category]
Of the data provided to the CXD3423GA by the timing generator block serial interface, the CXD3423GA loads
D10 and subsequent data to each data register as shown in the table below according to D08 .
D08
Description of operation
0 Loading to control data register
1 Loading to shutter data register
Note that the CXD3423GA can apply these categories consecutively within the same vertical period. However,
care should be taken as the data is overwritten if the same category is applied.
Control data: D12 , D13 MODE [Drive mode]
The CXD3423GA drive mode can be switched as follows. However, the drive mode bits are loaded to the
CXD3423GA and reflected at the falling edge of VD.
D13 D12
Description of operation
0
0 Draft mode (default)
0
1 Frame mode
1
0 AF mode^∗1
1
1 Test mode
∗1 _{The test mode results in ICX284/434 mode.}
Draft mode is the pulse elimination drive mode. This is a high frame rate drive mode that can be used for
purposes such as monitoring and moving pictures.
AF mode is the drive mode for applications with an even higher frame rate, and is used for auto focus (AF).
Frame mode is the drive mode in which the data for all lines of the ICX284/432/434 are read.
Control data: D16 NTPL [SSG function switching]
The CXD3423GA internal SSG output pattern can be switched as follows. However, the drive mode bits are
loaded to the CXD3423GA and reflected at the falling edge of VD. The default is "NTSC".
D16
Description of operation
0 NTSC equivalent pattern output (internal SSG)
1 PAL equivalent pattern output (internal SSG)
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