mc145193 Datasheet, PDF (2/24 Pages) Motorola, Inc – 1.1 GHZ PLL FREQUENCY SYNTHESIZER

MC145193
BLOCK DIAGRAM
REFin ²⁰
1
REFout
OSC or
4–Stage
Divider
(Configurable)
13–Stage R Counter
3
13
Double–buffered
BitGrabber™ R Register
16 Bits
CLK ¹⁸
19
Din
17
ENB
Shift
Register
And
Control
Logic
24
Internal
Control
4
BitGrabber™ C Register
8 Bits
Standby
Logic
POR
2
BitGrabber™ A Register
24 Bits
6
6–Stage
A Counter
12
12–Stage
N Counter
Data Out
fR
Port
fV
Select
Logic
16
Output A
Lock Detector
And Control
Phase/Frequency
Detector A And Control
2
LD
8 _Rx
6
PDout
Phase/Frequency
Detector B And Control
3 _φR
4 _φV
Output B
15 (Open–
Drain
Output)
fin
11
Input
fin
10
AMP
64/65
Prescaler
Supply Connections:
Pin 12 = VCC (V+ To Input AMP and 64/65 Prescaler)
Pin 5 = VPD (V+ To Phase/Frequency Detectors A and B)
Pin 14 = VDD (V+ To Balance Of Circuit)
Pin 7 = Gnd (Common Ground)
Modulus
Control
Logic
This device contains 7,278 active transistors.
13
Test 2
9
Test 1
2
MOTOROLA WIRELESS SEMICONDUCTOR
SOLUTIONS – RF AND IF DEVICE DATA