TL811 Datasheet, PDF (2/2 Pages) List of Unclassifed Manufacturers – STB/PVR Controller IC

TL811
STB/PVR Controller IC
APPLICATIONS
Â¥ Set-Top Boxes
Â¥ Digital TV
Â¥ Personal Video Recorders
SUPPORTING TERALOGIC PRODUCTS
Â¥ TL85x Decoder ICs
Â¥ Cougar Development Platform
PROGRAMMABLE TRANSPORT
INPUT/DEMULTIPLEXER
Â¥ Two dedicated and one bi-directional
transport input ports
Â¥ One dedicated and one bi-directional
transport output ports
Â¥ Glueless interface to IEEE 1394 devices
Â¥ Two ATSC/DVB/ARIB/DIRECTV
compliant demux
Â¥ Glueless interface to most front-end ICs
Â¥ Maximum input bit rate of 80 Mbits/sec
supported on each port
Â¥ Ability to transfer multiple SD streams to
the TeraLogic DTV Decoder for SD PIP
applications
DESCRAMBLERS
Â¥ DVB, DIRECTV DES-ECB, MPEG DES,
Triple DES-CBC, Multi-2 descrambling
supported
Â¥ Simultaneous descrambling of two
streams supported
Â¥ All three transport input ports can access
the descramblers
Â¥ Bypass mode of transport streams supported
CPU INTERFACE
Â¥ Glueless interface to MIPS CPUs such as
QED RM5231, NEC VR5432
Â¥ 32-bit wide multiplexed address/data
supported
Â¥ Write and Read posting buffers between
CPU and external resources (PCI, memory
bus and local bus).
LOCAL BUS
Â¥ Generic bus interface (16-bit data and
24-bit address bus)
Â¥ 6 Pre-decoded, programmable chip selects
Â¥ Can be configured to be fixed 8-bit only,
or 8- and 16-bit width device support
IDE ULTRA DMA INTERFACE
Â¥ Supports one IDE connector for up to 2
IDE drives
Â¥ Ultra DMA specifications allows 66
MByte transfer rate
SDRAM INTERFACE
Â¥ 32-bit wide SDRAM interface
Â¥ Supports 16/64/128-Mbit SDRAM
devices
PCI BUS INTERFACE
Â¥ 32-bit PCI 2.1 compliant interface
Â¥ 50 MHz or 33 MHz bus clock
Â¥ PCI Master/Slave/Arbiter capability
supported
Â¥ Supports burst transfers for efficient data
movement
PERIPHERALS
Â¥ Two ISO-7816 smart card interfaces
Â¥ Four Asynchronous UART
Â¥ Two I²C compatible master and slave
ports
Â¥ Three 32-bit timers/counters
Â¥ NRSS-A/NRSS-B support
Â¥ User-configurable general purpose I/Os
EPROM
FLASH
Local Bus
Other I/O
required
CPU
CPU Interface
(SysAD Bus)
Local Bus
Controller
SDRAM
Memory
Controller
TL811
TECHNOLOGY
Â¥ See grid below for packaging
¥ 2.5 V core, 3.3 V 1/0, 0.25µ CMOS
Â¥ 352 Ball BGA
HD Video
DTV Tuner
POD
DTV Tuner
Transport In
Transport In
1394/DVCR
Transport In & Out
T/S in 1
T/S in 2
T/S in 3
Demux
1
Demux
2
I²C
2 SmartCards
GPIO
UART
DTV I/O
I²C
SmartCards
GPIO
UART
PVR I/O
IDE
T/S Out
Descrambler 1
Descrambler 2
PCI BUS
Transport Out
TL85x
TeraLogic
DTV Decoder
Analog HD Out
Audio 5.1 out
SD Video Out
SD Video Capture
IDE
PCI Bus
Other Devices if required
TL811 SYSTEM DIAGRAM
TeraLogic, Inc. 1240 Villa Street Mountain View CA 94041
tel [phone] fax [phone] www.teralogic.tv
Copyright 2000. TeraLogic, Inc. All rights reserved worldwide. TeraLogic and the TeraLogic logo are registered trademarks of TeraLogic, Inc. Janus is a
trademark of TeraLogic, Inc. All other trademarks are properties of their respective owners and are acknowledged.
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