STK17TA8 Datasheet, PDF (2/22 Pages) List of Unclassifed Manufacturers – nvTime™ Event Data Recorder 128K x 8 AutoStore™ nvSRAM with Real-Time Clock Product Preview

STK17TA8
PACKAGES
48 Pin 300 mil SSOP
(not to scale)
40 Pin 600 mil DIP
PIN DESCRIPTIONS
Pin Name
I/O
A₀ - A₁₆
Input
DQ₀ -DQ₇
I/O
E
Input
W
Input
G
Input
X₁, X₂
V_rtccap
V_rtcbat
V_CCX
HSB
INT
Input
Power Supply
Power Supply
Power Supply
I/O
Output
V_CAP
V_SS
Power Supply
Power Supply
Description
Address: The 17 address inputs select one of 131,072 bytes in the
nvSRAM array or one of 16 bytes in the clock register map.
Data: Bi-directional 8-bit data bus for accessing the nvSRAM array and
clock.
Chip Enable: The active low E input selects the device.
Write Enable: The active low W enables data on the DQ pins to be
written to the adddress location latched by the falling edge of E.
Output Enable: The active low G input enables the data output buffers
during read cycles. Deasserting G high causes the DQ pins to tri-state.
Crystal: Connections for 32.768 kHz crystal.
Capacitor supplied backup RTC supply voltage.
Battery supplied backup RTC supply voltage.
Power (+ 3V)
Hardware Store Busy (I/O)
Interrupt Output: Can be programmed to respond to the clock alarm,
the watchdog timer and the power monitor. Programmable to either
active high (push/pull) or active low (open-drain).
Autostore Capacitor: Supplies power to nvSRAM during power loss to
store data from SRAM to nonvolatile elements.
Ground
February 2004
2 Document Control # ML0023 rev 0.3