GS71116TP Datasheet, PDF (2/15 Pages) List of Unclassifed Manufacturers – 1Mb Asynchronous SRAM

TSOP-II 64K x 16 Pin Configuration
A4
1
A3
2
A2
3
A1
4
Top view
A0
5
CE
6
DQ1
7
DQ2
8
DQ3
9
DQ4
10
VDD
11
44 pin
VSS
DQ5
12
13
TSOP II
DQ6
14
DQ7
15
DQ8
16
WE
17
A15
18
A14
19
A13
20
A12
21
NC
22
44
A5
43
A6
42
A7
41
OE
40
UB
39
LB
38
DQ16
37
DQ15
36
DQ14
35
34
33
32
31
DQ13
VSS
VDD
DQ12
DQ11
30
DQ10
29
DQ9
28
NC
27
A8
26
A9
25
A10
24
A11
23
NC
Block Diagram
A0
Row
Address ^Decoder
Input
Buffer
A15
CE
WE
OE
Control
UB ^_____
LB ^_____
Memory Array
Column
Decoder
I/O Buffer
DQ1
DQ16
GS71116TP/J/U
Rev: 1.06 6/2000
2/15
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 1999, Giga Semiconductor, Inc.