BCM8152 Datasheet, PDF (2/2 Pages) Broadcom Corporation. – 10 GBPS TRANSCEIVER WITH 10G CLOCK, BUS SKEW, AND LIMITING AMPLIFIER

OVERVIEW
POR
TxRESETB
TxPICLKSEL
SKEW1/0
TxPOLSEL
TxLSBSEL
TxPICLKP
TxPICLKN
LVDS
Parallel
Inputs
RB_LVDSIN
TxDIN[15:0]P
TxDIN[15:0]N
TxREFCLKP
TxREFCLKN
TxRATESEL1/0
TxREFSEL
TxMCLKSEL
IFSEL
VCP/VCN_CMU
RB_TX
B
PDTSCLK
C
FIFO
Control
Write
Pointer
Input
Register
16 x 10 16
FIFO
16:1
MUX
Read
Pointer
Output
Retimer
B
C
Multi-rate CMU
TxFIFOERRB
TSDP
TSDN
TSCLKP
TSCLKN
CML
Serial
Input
TxPCLKP
TxPCLKN
TxMCLKP
TxMCLKP
TxLOCKERRB
RB_LVDSOUT
RxMCLKSEL
RxMUTEMCLKB
RxMUTEPOCLKB
RxMUTEDOUTB
RxPOLSEL
RXLSBSEL
CML
Serial
RDINP
Input _RDINN
A
Limiting
Amplifier
OFFSETP/N
ENEXTOFST
RxREFCLKP
RxREFCLKN
VCP/VCN_CDR
RxRATESEL1/0
RxREFSEL
RxLCKREFB
LOSIB
RxREFCKENB
RxPHSADJ[2:0,FINE]
RB_ALOSB
TH_ALOSB2/1
A
A
16
1:16
DeMux
Output
Register
A
Multi-Rate
CDR
ALOS
DETECT
RxDOUT[15:0]N
RxDOUT[15:0]P
RxPOCLKN
RxPOCLKP
RxMCLKN
RxMCLKP
LVDS
Parallel
Outputs
RxLOCKERRB
ALOSB
The BCM8152 is a fully integrated MSA-compatible multi-rate
SONET/SDH/10GE/FEC transceiver operating at the OC-192/STM-64
(9.953 Gbps), 10GE (10.3125 Gbps), 10GFC (10.315 Gbps), or one of
three FEC (Forward Error Correction) (10.664/10.709, 11.096, or 11.31
Gbps) data rates with serializer, deserializer, integrated clock
multiplication unit (CMU), 10G clock, bus skew, limiting amplifier, data
recovery circuit (CDR), and enhanced feature set. On-chip clock
synthesis is performed by the high-frequency, low-jitter phase-locked
loop (PLL) on the BCM8152 transceiver chip allowing the use of a low-
frequency reference clock selectable to the line rate divided by either 16
or 64.
Clock recovery is performed on the device by synchronizing its on-chip
voltage-controlled oscillator (VCO) directly to the incoming data stream.
An on-chip phase detector and charge pump plus external VCXO
implements a cleanup PLL. The cleanup PLL can be used to clean up the
CDR recovered clock for loop timing applications or to clean up a noisy
system clock.
The low-jitter LVDS interface guarantees compliance with the bit error
rate requirements of the Telcordia, ANSI, ITU-T, and IEEE 802.3ae
standards.
The BCM8152 is packaged in a 15 x 15 mm, 301-pin BGA.
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®
BROADCOM CORPORATION
16215 Alton Parkway, P.O. Box 57013
Irvine, California 92619-7013
© 2004 by BROADCOM CORPORATION. All rights reserved.
8152-PB02-R
04/23/04
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