BCM8112 Datasheet, PDF (2/2 Pages) Broadcom Corporation. – 16BIT LVDS AND 64BIT LVPECL INTERFACE

BCM8112 OVERVIEW
Interface Block Diagram
LCKDET_CMU
RESET
CLK155TIP
CLK155TIN
155.52/166.63 MHz
LVPECL
DPI0
DPI63
155.52/166.63 Mbps
LVPECL
CLK622TIP
CLK622TIN
622.08/666.51 Mbps LVDS
DLI0P
DLI0N
DLI15P
DLI15N
622.08/666.51 Mbps LVDS
CLK622RIP
CLK622RIN
622.08/666.51 MHz LVDS
FIFO
Control
Write
Pointer
Read
Pointer
Output
Retime
Divide by 4
Divide by 4
OVF
DLO0P
DLO0N
622.08/666.51 Mbps LVDS
DLO15P
DLO15N
CLK622TOP
CLK622TON
622.08/666.51 MHz LVDS
CLK155TOP
CLK155TON
155.52/166.63 MHz STL
DPO0
155.52/166.63 Mbps STL
DPO63
CLK155ROP
CLK155RON
155.52/166.63 MHz STL
The BCM8112 16/64 LVDS/LVPECL interface is a fully
integrated, 64:16 MUX and 16:64 DEMUX. The low-speed, 64-
bit interface operates at 155.52/166.65 Mbps, and the high-
speed, 16-bit interface operates at 622.08/644.45 Mbps. The 64-
bit input interface is LVPECL, while the 64-bit output interface
is STL. Both the 16-bit input and output interfaces are LVDS.
An on-chip 64 x 9 FIFO reduces any system timing issues. In
OC-192 applications, this device can be used as an interface
between a 64-bit LVPECL ASIC and 16-bit LVDS
BCM8110/8111 OC-192 transmitter/receiver. The BCM8112
comes in a 35 x 35 mm BGA package.
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8112-PB01-R-8.27.01
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