ADS-238Q Datasheet, PDF (2/7 Pages) List of Unclassifed Manufacturers – 12-Bit, 20MHz, Low Power Sampling A/D Converters

ADS-238Q
®
®
ABSOLUTE MAXIMUM RATINGS
PARAMETERS
LIMITS
Supply Voltage, VS (Pins 4-9,44)
Input Voltages:
Analog Input, VIN+, VIN–
(Pin 20, 21)
VREF–, VREF+, (Pin 10, 11)
CLK, (Pin 2)
Lead Temperature (10 seconds)
–0.5 to +6
–0.5 to (+VS +0.5)
–0.5 to (+VS +0.5)
–0.5 to (+VS +0.5)
+300
UNITS
Volts
Volts
Volts
Volts
°C
FUNCTIONAL SPECIFICATIONS
(TA = TMIN to TMAX, VS = 3.3V, VREF– = 1.15V, VREF+ = 2.15V, VCM = 1.65V, CLK
Frequency = 20MHz, BIAS1 = 90µA, BIAS2 = 9.5µA, Duty Cycle = 50% and
Differential Input, unless otherwise specified.)
ANALOG INPUTS
MIN. TYP. MAX. UNITS
Differential Input Voltage Range ±0.6
Common Mode Input Voltage
1.2
Input Capacitance
—
Input Bandwidth, Large Signal
—
±1.0
±1.7
Volts
1.65
1.9
Volts
1.4
—
pF
120
—
MHz
DIGITAL INPUTS
Logic Levels
Logic "1"
Logic "0"
Logic Loading "1"
Logic Loading "0"
Input Capacitance
80% VS
—
—
—
—
—
—
Volts
— 20% VS Volts
—
±1
µA
—
±1
µA
1.8
—
pF
REFERENCE VOLTAGES
Reference Input Voltage Range
(VREF+ - VREF–)
0.6
1.0
1.7
Volts
Negative Reference Voltage
(VREF–)
—
1.15
—
Volts
Positive Reference Voltage
(VREF+)
—
2.15
—
Volts
Common Mode Output Voltage
(VCM)
1.3
1.65
1.8
Volts
STATIC PERFORMANCE
Resolution
Differential Nonlinearity
Integral Nonlinearity
Common Mode rejection ratio
No Missing Codes
Offset, Mid-Scale
Gain Error
—
12
—
Bits
—
±0.6
—
LSB
—
±3.0
—
LSB
—
55
—
dB
12
—
—
Bits
—
±1.0
—
%FSR
—
0.3
—
%
DYNAMIC PERFORMANCE
Peak Harmonics
FIN = 5MHz
FIN = 10MHz
Total Harmonics Distortion
FIN = 5MHz
FIN = 10MHz
Signal-to-Noise Ratio
(w/o distortion)
FIN = 5MHz
FIN = 10MHz
Signal-to-Noise Ratio
(and distortion)
FIN = 5MHz
FIN = 10MHz
Effective Number of Bits
FIN = 5MHz
FIN = 10MHz
62
70
—
dB
—
61
—
dB
—
–68
–61
dB
—
–60
—
dB
59
62
—
dB
—
58
—
dB
57
61
—
dB
—
56
—
dB
9.2
9.8
—
Bits
—
9.0
—
Bits
DYNAMIC PERFORMANCE
Differential Phase
Differential Gain
Aperature Uncertainty
Aperture Delay Time, tAP
Data Latency
A/D Conversion Rate
—
0.2
— Degrees
—
0.5
—
%
—
10
—
ps rms
—
5
—
ns
—
7.5
—
Cycles
20
—
—
MHz
DIGITAL OUTPUTS
Logic "1"
80% VS 95% VS —
Volts
Logic "0"
—
0.1
0.4
Volts
CLK to Output Delay Time, tD
4
8
12
ns
POWER REQUIREMENTS
Supply Voltages, VS
2.8
3.3
3.6
Volts
Supply Current, IS
—
24
30
mA
Power Dissipation
—
79
100
mW
Power Supply Rejection Ratio
—
63
—
dB
PHYSICAL/ENVIRONMENTAL
Operating Temp. Range, Case
Storage Temperature Range
Package Type
Weight
0
—
+70
°C
–65
—
+125
°C
44-pin (leaded), plastic thin quad flat package
0.2 grams
TECHNICAL NOTES
Differential Analog Input
The analog input is a fully differential input that can be
configured in various ways depending on whether a single-
ended or differential, AC or DC coupled input is required.
An AC coupled input is most readily implemented using a
transformer (1:1 with a center tap on the secondary
winding) as illustrated in Figures 2, Typical Connection
Diagram, and 3.1, Transformer Coupled Input. To minimize
distortion, the core of the transformer must not saturate at
full scale input voltage levels. To minimize kickback noise
from the internal sample-hold a small capacitor should be
connected across the VIN pins (pins 20 and 21).
Figure 3.2, DC Coupled Single Ended Input, illustrates a
conversion circuit for a DC coupled single-ended input.
Power supplies and by-pass capacitors are not shown.
Reference Voltage Inputs
The ADS-238Q is designed to accept two external
reference voltages at the VREF input pins, see Figure 2,
Typical Connection Diagram. These reference voltages,
applied to VREF+ (pin 11) and VREF– (pin 10), determine the
analog input voltage range, which is equal to ±(VREF+ -
VREF–). This voltage range will be symmetric about the
common mode voltage, and for best performance should
be symmetrical about the midpoint of the supply voltage.
In order to minimize overall converter noise it is
recommended that the VREF pins be adequately bypassed
using a 4.7µF tantalum capacitor in parallel with a 0.01µF
ceramic capacitor. Locate the bypass capacitors as close
to the unit as possible.
2