LM3S618 Datasheet, PDF (174/396 Pages) List of Unclassifed Manufacturers – Microcontroller

General-Purpose Timers
Register 8: GPTM Interrupt Clear (GPTMICR), offset 0x024
This register is used to clear the status bits in the GPTMRIS and GPTMMIS registers. Writing a 1
to a bit clears the corresponding bit in the GPTMRIS and GPTMMIS registers.
GPTM Interrupt Clear (GPTMICR)
Offset 0x024
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
reserved
Type
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Type
RO
Reset
0
reserved
RO
RO
RO
0
0
0
CBECINT CBMCINT TBTOCINT
W1C
W1C
W1C
W1C
RO
0
0
0
0
0
reserved
RO
RO
0
0
RTCCINT CAECINT CAMCINTTATOCINT
RO
W1C
W1C
W1C
W1C
0
0
0
0
0
Bit/Field
31:11
Name
reserved
10
CBECINT
9
CBMCINT
8
TBTOCINT
7:4
reserved
3
RTCCINT
2
CAECINT
1
CAMCINT
0
TATOCINT
Type
RO
W1C
W1C
W1C
RO
W1C
W1C
W1C
W1C
Reset
0
0
0
0
0
0
0
0
0
Description
Reserved bits return an indeterminate value, and should never
be changed.
GPTM CaptureB Event Interrupt Clear
0: The interrupt is unaffected.
1: The interrupt is cleared.
GPTM CaptureB Match Interrupt Clear
0: The interrupt is unaffected.
1: The interrupt is cleared.
GPTM TimerB Time-Out Interrupt Clear
0: The interrupt is unaffected.
1: The interrupt is cleared.
Reserved bits return an indeterminate value, and should never
be changed.
GPTM RTC Interrupt Clear
0: The interrupt is unaffected.
1: The interrupt is cleared.
GPTM CaptureA Event Interrupt Clear
0: The interrupt is unaffected.
1: The interrupt is cleared.
GPTM CaptureA Match Raw Interrupt
This is the CaptureA match interrupt status after masking.
GPTM TimerA Time-Out Raw Interrupt
0: The interrupt is unaffected.
1: The interrupt is cleared.
174
May 4, 2007
Preliminary